M052ZAN Nuvoton Technology Corporation of America, M052ZAN Datasheet - Page 324

• Manufacturer Part Number: M052ZAN
• Description: IC MCU 32BIT 8KB FLASH 33QFN
• Manufacturer: Nuvoton Technology Corporation of America
• Series: NuMicro M051™r

Specifications of M052ZAN

• Core Processor: ARM Cortex-M0
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 5x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 33-WFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Bits
[31:12]
[11]
[10]
[9]
[8]
7
TRGCOND
NuMicro M051
Descriptions
Reserved
ADST
DIFFEN
Reserved
TRGEN
6
5
-
A/D Conversion Start
1 = Conversion start.
0 = Conversion stopped and A/D converter enter idle state.
ADST bit can be set to 1 from two sources: software write and external pin
STADC. ADST is cleared to 0 by hardware automatically at the ends of single
mode and single-cycle scan mode on specified channels. In continuous scan
mode, A/D conversion is continuously performed sequentially until software
write 0 to this bit or chip reset.
A/D Differential Input Mode Enable
1 = A/D is in differential analog input mode
0 = A/D is in single-end analog input mode
Differential input voltage (V
Note: In differential input mode, only one of the two corresponding channels
needs to be enabled in ADCHER. The conversion result will be placed to the
corresponding data register of the enabled channel. If both channels of a
differential input paired channel are enabled, the ADC will convert it twice in
scan mode. And then write the conversion result to the two corresponding data
registers.
-
External Trigger Enable
Enable or disable triggering of A/D conversion by external STADC pin.
1= Enable
0= Disable
TRGS
™
Series Technical Reference Manual
Differential input paired
4
- 324 -
channel
0
1
2
3
3
diff
Publication Release Date: Sep 14, 2010
ADMD
) = V
plus
- V
2
minus
AIN0
AIN2
AIN4
AIN6
V
plus
ADC analog input
ADIE
1
V
AIN1
AIN3
AIN5
AIN7
Revision V1.2
minus
ADEN
0