HCPL2730 Fairchild Semiconductor, HCPL2730 Datasheet - Page 6

High Speed Optocouplers DIP-8 DUAL PH DARL

HCPL2730

Manufacturer Part Number
HCPL2730
Description
High Speed Optocouplers DIP-8 DUAL PH DARL
Manufacturer
Fairchild Semiconductor
Datasheet

Specifications of HCPL2730

Input Type
DC
Isolation Voltage
2500 Vrms
Maximum Continuous Output Current
60 mA
Maximum Fall Time
35 us
Maximum Forward Diode Current
20 mA
Maximum Rise Time
20 us
Output Device
Darlington With Base
Configuration
2 Channel
Current Transfer Ratio
2500 %(Typ)
Maximum Baud Rate
100 KBps
Maximum Forward Diode Voltage
1.7 V
Maximum Reverse Diode Voltage
5 V
Maximum Input Diode Current
20 mA
Maximum Power Dissipation
100 mW
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Package / Case
PDIP Black
No. Of Channels
2
Optocoupler Output Type
Photodarlington
Input Current
1.6mA
Output Voltage
7V
Opto Case Style
DIP
No. Of Pins
8
Input Current Max
1.6mA
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
HCPL2730_NL

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©2005 Fairchild Semiconductor Corporation
6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.5
Electrical Characteristics
Current Limiting Resistor Calculations
R
R
R
Where:
V
V
V
V
V
I
V
I
I
F
L
2
OL1
OH1
OLX
DD1
DD2
DF
1
1
2
= Diode Forward Current
= Load Current Through
= Input Current of Output Gate
= V
Resistor R2
(Non-Invert) = V
(Invert) = V
= Diode Forward Voltage
IN
= Logic “0” Voltage of Driver
= Saturation Voltage of
= Input Supply Voltage
= Output Supply Voltage
= Logic “1” Voltage of Driver
Fig. 2 Non-Inverting Logic Interface
DD2
Output Transistor
= V
V
R
OLX
DD1
1
DD1
I
L
(@ I
1
2
3
4
– V
DD1
I
F
OH1
L
– V
– I
I
– V
2
F
DF
)
DF
– V
OL1
8
7
6
5
(Continued) T
74LSXX NON-INV. 2000
74HXX NON-INV. 2000
@ 10V
74SXX NON-INV. 2000
R
CMOS
CMOS
74LXX
V
@ 5V
74XX
2
DD2
INPUT
NON-INV. 2000
NON-INV. 5100
NON-INV. 2200
NON-INV. 1800
A
OUT
= 25°C unless otherwise specified)
INV.
INV.
INV.
INV.
INV.
INV.
INV.
6
R1 (V)
4700
IN
510
180
100
360
180
180
Fig. 1 Resistor Values for Logic Interface
CMOS
R2 (V)
1000
@ 5V
R
1
Fig. 3 Inverting Logic Interface
CMOS
@ 10V
R2 (V)
2200
1
2
3
4
R2 (V)
74XX
750
74LXX
R2 (V)
OUTPUT
1000
8
7
6
5
74SXX
R2 (V)
1000
R
V
2
DD2
74LSXX
R2 (V)
1000
www.fairchildsemi.com
OUT
74HXX
R2 (V)
560

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