MAX1441GUP/V+ Maxim Integrated Products, MAX1441GUP/V+ Datasheet - Page 24

• Manufacturer Part Number: MAX1441GUP/V+
• Description: Touch Screen Converters & Controllers PROXIMITY SENSR el Proximity and Tou
• Manufacturer: Maxim Integrated Products

Specifications of MAX1441GUP/V+

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Automotive, Two-Channel Proximity and
Touch Sensor
Table 11. Special-Function Register Bit Description (continued)
24
TFRQ (05h, 00h)
Initialization
Read/Write Access
TFRQ[7:0]
TCNT (06h, 00h)
Initialization
Read/Write Access
TCNT[7:0]
PI0 (08h, 00h)
Initialization
Read/Write Access
PI0[6:0]
PI0.7
PD0 (09h, 00h)
Initialization
Read/Write Access
PD0[6:0]
PD0.7
BRKP (0Fh, 00h)
Initialization
Read/Write Access
BRKP.0–BREAK
BRKP[7:1]
ICDT0 (18h, 00h)
Initialization
Read/Write Access
ICDT0[15:0]
ICDT1 (19h, 00h)
Initialization
Read/Write Access
ICDT1[15:0]
REGISTER
Timer Frequency Register (8-Bit Register)
This register is cleared to 00h on all forms of reset.
Unrestricted read. This register can only be written when TCLK = 0; otherwise, a write to this register is
ignored.
Timer Reload Register Bits [7:0]. This register is used to store Timer overflow value.
Timer Count Register (8-Bit Register)
This register is cleared to 00h on all forms of reset.
Unrestricted read. This register can only be written when TCLK = 0; otherwise, a write to this register is
ignored.
Timer Count Register Bits [7:0]. This register is used to load and read a value to/from the Timer.
Port 0 Input Register (8-Bit Register)
The reset value for this register is dependent on the logical states of the pins.
Unrestricted read only
Port 0 Input Register Bits [6:0]. This register reflects the logic state of its port pins when read.
Reserved. Read returns 0.
Port 0 Direction Register (8-Bit Register)
This register is cleared to 00h on all forms of reset.
Unrestricted read/write.
Port 0 Direction Register Bits [6:0]. This register is used to determine the direction of the Port 0
function. The port pins are independently controlled by their direction bits. When a bit is set to 1, its
corresponding pin is used as an output; data in the PO register is driven on the pin. When a bit is
cleared to 0, its corresponding pin is used as an input, and allows an external signal to drive the pin.
Note that when functioning as an input, the port pin is driven to a high-impedance state.
Reserved. Read returns 0.
Software Breakpoint Register (8-Bit Register)
This register is cleared to 00h on all forms of reset.
Unrestricted read/write.
BREAK. Setting this bit causes an emulation breakpoint to activate and halt the system on the
instruction, which sets the bit. This bit is connected directly to the SBPE input on the emulation block
and is self-clearing. A read of this bit always returns zero.
Reserved. Read returns 0.
In-Circuit Debug Temp 0 Register (16-Bit Register)
This register is cleared to 0000h after a power-on reset or a Test-Logic-Reset TAP state.
Unrestricted read/write access by the CPU from background or debug mode.
In-Circuit Debug Temp 0 Register Bits [15:0]. This register is intended for use by the utility ROM
in-circuit debug or test routines as temporary storage to save registers that might otherwise have to
be placed in the stack (e.g., DPC, DP[n]).
In-Circuit Debug Temp 1 Register (16-Bit Register)
This register is cleared to 0000h after a power-on reset or a Test-Logic-Reset TAP state.
Unrestricted read/write access by the CPU from background or debug mode.
In-Circuit Debug Temp 1 Register Bits [15:0]. This register is intended for use by the utility ROM
in-circuit debug or test routines as temporary storage to save registers that might otherwise have to
be placed in the stack (e.g., DPC, DP[n]).
DESCRIPTION