MC56F8256VLF Freescale Semiconductor, MC56F8256VLF Datasheet - Page 10

• Manufacturer Part Number: MC56F8256VLF
• Description: DSC 64K FLASH 60MHZ 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8256VLF

• Core Processor: 56800E
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 39
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Ram Size: 4K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x12b, D/A 1x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 48-LQFP
• Product: DSCs
• Processor Series: 56800E
• Core: 56800E
• Device Million Instructions Per Second: 60 MIPs
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 39
• Data Ram Size: 8 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 5 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Features
2.5.5
2.5.6
2.5.7
2.5.8
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One 12-bit digital-to-analog converter (12-bit DAC)
— 12-bit resolution
— Power-down mode
— Output can be routed to internal comparator or off chip
Two four-channel 16-bit multi-purpose timer (TMR) modules
— Four independent 16-bit counter/timers with cascading capability per module
— Up to 120 MHz operating clock
— Each timer has capture and compare and quadrature decoder capability
— Up to twelve operating modes
— Four external inputs and two external outputs
Two queued serial communication interface (QSCI) modules with LIN slave functionality
— Up to 120 MHz operating clock
— Four-byte-deep FIFOs available on both transmit and receive buffers
— Full-duplex or single-wire operation
— Programmable 8- or 9-bit data format
— 13-bit integer and 3-bit fractional baud rate selection
— Two receiver wakeup methods:
— 1/16 bit-time noise detection
— LIN slave operation
One queued serial peripheral interface (QSPI) module
— Full-duplex operation
— Four-word deep FIFOs available on both transmit and receive buffers
— Master and slave modes
— Programmable length transactions (2–16 bits)
— Programmable transmit and receive shift order (MSB as first or last bit transmitted)
— Maximum slave module frequency = module clock frequency divided by two
— 13-bit baud rate divider for low-speed communication
– Idle line
– Address mark
DAC
TMR
QSCI
QSPI
MC56F825x/MC56F824x Product Brief, Rev. 2
Preliminary
Freescale Semiconductor