73M1866B-IMR/F Maxim Integrated Products, 73M1866B-IMR/F Datasheet - Page 44

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73M1866B-IMR/F

Manufacturer Part Number
73M1866B-IMR/F
Description
MICRODAA SGL PCM HIGHWAY 42-QFN
Manufacturer
Maxim Integrated Products
Series
MicroDAA™r
Datasheets

Specifications of 73M1866B-IMR/F

Includes
PCM Highway
Function
Data Access Arrangement (DAA)
Interface
PCM, Serial, SPI
Number Of Circuits
1
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
42-VFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Power (watts)
-
73M1866B/73M1966B Data Sheet
7.6
For
This audio output contains both transmit and receive data with configurable levels.
7.7
After switching from 8 kHz sampling rate to 16 kHz sampling rate, the SLEEP bit must be enabled then
disabled if the Call Progress Monitor function is used. After cycling the SLEEP bit, the Line-Side Device
registers (Registers 0x12 to 0x18) must be reconfigured.
7.8
For a correct reset of the 73M1x66B, the RST signal must be asserted for a minimum period of 1 ms.
PCLK must be active for a minimum of 8 clock cycles before the RST signal can be de-asserted. The
PLL locks to the PCLK after 20 PCM frames as defined by the occurrence of the Frame Sync Signal (FS).
This gives a minimum period of 3.5 ms from the assertion of RST until the PLL is locked and normal
operations may occur, including access to all device registers and the transmission and reception of PCM
data samples. If PCLK changes frequency, then the PLL will lose lock so a stable clock must be used
during this reset period. If a PCLK frequency change is required after the reset, the user should
implement the procedure described for PCODE (Register 0x23 bits 2 to 5).
44
Function
Mnemonic
CMRXG
CMTXG
CMVSEL
the purpose of monitoring activities on the line, a Call Progress Monitor is provided in the 73M1x66B.
Call Progress Monitor
16 kHz Operation of Call Progress Monitor
Device Reset
Register
Location
0x10[1:0]
0x10[3:2]
0x10[4]
Type
W
W
W
Receive Path Gain Setting
Transmit Path Gain Setting
Call Progress Monitor Voltage Reference Select
Quiescent DC voltage select at AOUT.
0 = 1.5 Vdc. (Default)
1 = VCC/2 Vdc.
00
01
10
11
00
01
10
11
0 dB (for full swing, AOUT=1.08 Vpk) (Default)
-6 dB
-12 dB
MUTE
0 dB (for full swing, AOUT=1.08 Vpk) (Default)
-6 dB
-12 dB
MUTE
Description
DS_1x66B_001
Rev. 1.6

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