ISL80101AIRAJZ Intersil, ISL80101AIRAJZ Datasheet - Page 3

• Manufacturer Part Number: ISL80101AIRAJZ
• Description: IC REG LDO ADJ 1A 10DFN
• Manufacturer: Intersil

Specifications of ISL80101AIRAJZ

• Regulator Topology: Positive Adjustable
• Voltage - Output: 0.8 V ~ 5 V
• Voltage - Input: 2.2 V ~ 6 V
• Voltage - Dropout (typical): 0.09V @ 1A
• Number Of Regulators: 1
• Current - Output: 1A (Max)
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 10-VFDFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Limit (min): -

Pin Configurations
Pin Descriptions
PIN NUMBER
9, 10
1, 2
3
4
5
6
7
8
-
PIN NAME
ENABLE
EPAD
V
GND
I
ADJ
V
PG
SS
SET
OUT
IN
3
Output voltage. A minimum 10uF X5R/X7R output capacitor is required for stability. See “External Capacitor
Requirements” on page 8 for more details.
LDO output feedback input. To adjust the output voltage, connect this pin to a resistive voltage divider from the
V
V
Ground.
External capacitor adjusts in-rush current.
V
Current limit setting. Current limit is 1.62A when this pin is left floating. This default value can be increased by
tying R
details.
Input supply. A minimum of 10µF X5R/X7R input capacitor is required for stability. See “External Capacitor
Requirements” on page 8 for more details.
EPAD at ground potential. Soldering it directly to GND plane is required for thermal considerations. See “Power
Dissipation and Thermals” on page 9 for more details.
OUT
OUT
IN
-independent chip enable. TTL and CMOS compatible.
to GND.
in regulation signal. Logic low indicates V
SET
to GND, or decreased by tying R
V
V
GND
OUT
OUT
ADJ
PG
1
2
3
4
5
ISL80101A
(10 LD 3X3 DFN)
ISL80101A
TOP VIEW
PAD
SET
OUT
to V
10
9
8
7
6
DESCRIPTION
IN
is not in regulation, and must be grounded if not used.
V
V
I
ENABLE
SS
SET
. See “Programmable Current Limit” on page 7 for more
IN
IN
February 24, 2011
FN7712.2