PM6652 STMicroelectronics, PM6652 Datasheet - Page 27

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PM6652

Manufacturer Part Number
PM6652
Description
IC CTLR STEPDOWN SMPS 32VFQFPN
Manufacturer
STMicroelectronics
Datasheet

Specifications of PM6652

Applications
Controller, Intel IMVP-6.5™, VR11
Voltage - Input
4.5 V ~ 36 V
Number Of Outputs
1
Voltage - Output
0.3 V ~ 1.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-VFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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PM6652
8.1.1
8.1.2
Constant on time PWM architecture
Figure 24 on page 24
minimum off-time constrain (250 ns typ.) is introduced to allow inductor valley current
sensing on synchronous switch. A minimum on-time (70 ns) is also introduced to assure the
start-up switching sequence.
PM6652 has a one-shot generator that turns on the high side MOSFET when the following
conditions are satisfied simultaneously:
Once the on-time has timed out, the high side switch is turned off, while the synchronous
switch is turned on, according to the anti-cross conduction circuitry management.
When the negative input voltage at the PWM comparator reaches the valley limit
(determined by the output voltage), the low-side mosfet is turned off according to the anti-
cross conduction logic once again, and a new cycle begins.
Output ripple compensation
In a classic constant on time control, the system regulates the valley value of the output
voltage and not the average value. In this condition, the half of the output voltage ripple is
the equivalent DC static error.
To compensate this error, an integrator network has been introduced in the control loop, by
connecting the CSNS pin to the COMP pin through a capacitor C
on page 28
the sense resistor R
R
and G
is:
Equation 5
The integrator amplifier generates a current, proportional to the DC input error, which sets
the output voltage in order to compensate the total static error. So doing the DC output
voltage value is independent of the output ripple, ensuring a very good line and load
regulation.
In addition, C
condition, the voltage at COMP pin is the sum of the output voltage and the output ripple.
OUT
The PWM comparator is high;
The synchronous rectifier current is below the current limit threshold;
The minimum off-time has timed out.
is the cumulative output capacitors’ ESR, C
M
is an internal parameter (Gm = 50 µs typ.), the loop stability requires that C
. The ripple is generated by the output capacitor ESR and by the voltage drop on
INT
provides an AC path for the R
SENSE
shows the simplified block diagram of a constant on time controller. A
(inductor’s DCR or dedicated sense resistor). Assuming that
Doc ID 16867 Rev 3
C
INT
g
M
C
SENSE
OUT
OUT
R
voltage ripple. In steady state
OUT
is the cumulative output capacitance
INT
as shown in
Device description
Figure 25
INT
value
27/53

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