PM6652 STMicroelectronics, PM6652 Datasheet - Page 35

• Manufacturer Part Number: PM6652
• Description: IC CTLR STEPDOWN SMPS 32VFQFPN
• Manufacturer: STMicroelectronics

Specifications of PM6652

• Applications: Controller, Intel IMVP-6.5™, VR11
• Voltage - Input: 4.5 V ~ 36 V
• Number Of Outputs: 1
• Voltage - Output: 0.3 V ~ 1.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-VFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PM6652
8.9
8.10
8.10.1
8.10.2
Internal MOS drivers
The integrated high-current gate drivers allow using different power MOSFETs.
The high side driver, which is supplied by the +5 V rail, uses a bootstrap circuit with
integrated boot diode. Only one external ceramic capacitor (100 nF or bigger) is required.
The BOOT and PHASE pins work respectively as supply and return path for the high-side
driver, while the low-side driver is directly fed through PVCC and PGND pins.
An important feature of the PM6652 gate drivers is the adaptive anti-cross-conduction
circuitry, which prevents high-side and low-side MOSFETs from being turned on at the same
time. When the high-side MOSFET is turned off, the voltage at the PHASE node begins to
fall. The low-side MOSFET is turned on only when the voltage at the PHASE node reaches
an internal threshold in the range of 2.5 V to 1 V. Similarly, when the low-side MOSFET is
turned off, the high-side one remains off until the LGATE pin voltage is above 0.8 V (typical
value).
Monitoring and protections
Power good
The power good signal is an open-drain output which requires an external pull-up resistor.
When VOUT is lower than 300 mV or higher than 200 mV respect to VDAC, or when the
COREON pin is de-asserted, the PWRGD pin is immediately forced low.
At the start-up, the PWRGD pin is allowed to rise only 4 ms after the VDAC programmed
value is reached, as shown in
Current monitor (IMON)
The voltage sensed between CSNS and VOUT pins is mirrored across RG external resistor
(between IMONFB and VOUT pins) and the resultant current is multiplied by the current
monitor block gain.
The typical gain value is:
Equation 14
The current monitor gain can be adjusted by choosing RIMON, as shown in
order to program the required V
Equation 15
G
400 Ω with maximum allowable IMONFB current lower than about I
A good range for RG choice is [0.68kΩ; 7kΩ] with a maximum CSNS-VOUT voltage up to 60
mV.
IMON,INT
=3 is a fixed internal parameter. The minimum suggested value for RG is equal to
CSNS
Figure 6 on page 20
Doc ID 16867 Rev 3
IMON
V
IMON
−
at maximum load. The total IMON gain becomes:
VOUT
G
IMON
=
,
INT
G
IMON
=
,
3
Figure 34
,
INT
⋅
R
R
IMON
G
and
Figure 35
MAX
Device description
= 40 µA (typ.).
.
Figure 39
, in
35/53