ISL95870AHRUZ-T Intersil, ISL95870AHRUZ-T Datasheet - Page 24

• Manufacturer Part Number: ISL95870AHRUZ-T
• Description: IC CTRLR PWM 1PHASE GPU 20UTQFN
• Manufacturer: Intersil

Specifications of ISL95870AHRUZ-T

• Applications: Controller, GPU Core Power
• Voltage - Input: 3.3 V ~ 25 V
• Number Of Outputs: 1
• Voltage - Output: 0.5 V ~ 5 V
• Operating Temperature: -10°C ~ 100°C
• Mounting Type: *
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

dissipated by the drivers is approximated as
Equation 44:
Where:
MOSFET Selection and Considerations
The choice of MOSFETs depends on the current each
MOSFET will be required to conduct, the switching
frequency, the capability of the MOSFETs to dissipate
heat, and the availability and nature of heat sinking and
air flow.
Typically, a MOSFET cannot tolerate even brief excursions
beyond their maximum drain to source voltage rating.
The MOSFETs used in the power stage of the converter
should have a maximum V
sum of the upper voltage tolerance of the input power
source and the voltage spike that occurs when the
MOSFETs switch.
There are several power MOSFETs readily available that
are optimized for DC/DC converter applications. The
preferred high-side MOSFET emphasizes low gate charge
so that the device spends the least amount of time
dissipating power in the linear region. The preferred low-
side MOSFET emphasizes low r
saturated to minimize conduction loss.
P
- F
- V
- V
- Q
- Q
- P
- P
=
1000
FIGURE 20. POWER DISSIPATION vs FREQUENCY
900
800
700
600
500
400
300
200
100
driver into the gate of the MOSFET and discrete
capacitors
into the gate of the MOSFET and discrete
capacitors
driver
upper driver
F
sw
L
U
sw
U
L
U
L
0
is the quiescent power consumption of the lower
is the lower gate driver bias supply voltage
is the charge to be delivered by the lower driver
is the quiescent power consumption of the
0
(
is the upper gate driver bias supply voltage
is the charge to be delivered by the upper
1.5V
is the switching frequency of the PWM signal
Q
Q
U
L
200 400 600 800 1k 1.2k 1.4k 1.6k 1.8k 2k
=200nC
=100nC
U
Q
U
+
V
L
Q
Q
Q
L
L
FREQUENCY (Hz)
U
=100nC
)
=50nC
+
P
24
DS
L
+
P
rating that exceeds the
U
DS(on)
ISL95870, ISL95870A, ISL95870B
when fully
Q
Q
Q
Q
U
L
U
L
=50nC
=20nC
=50nC
=50nC
(EQ. 44)
For the low-side MOSFET, (LS), the power loss can be
assumed to be conductive only and is written as
Equation 45:
For the high-side MOSFET, (HS), its conduction loss is
written as Equation 46:
For the high-side MOSFET, its switching loss is written as
Equation 47:
Where:
Layout Considerations
As a general rule, power layers should be close together,
either on the top or bottom of the board, with the weak
analog or logic signal layers on the opposite side of the
board. The ground-plane layer should be adjacent to the
signal layer to provide shielding. The ground plane layer
should have an island located under the IC, the
components connected to analog or logic signals. The
island should be connected to the rest of the ground
plane layer at one quiet point.
There are two sets of components in a DC/DC converter,
the power components and the small signal components.
The power components are the most critical because
they switch large amount of energy. The small signal
components connect to sensitive nodes or supply critical
bypassing current and signal coupling.
The power components should be placed first and these
include MOSFETs, input and output capacitors, and the
inductor. Keeping the distance between the power train
and the control IC short helps keep the gate drive traces
short. These drive signals include the LGATE, UGATE,
PGND, PHASE and BOOT.
When placing MOSFETs, try to keep the source of the
upper MOSFETs and the drain of the lower MOSFETs as
close as thermally possible. See Figure 21. Input high
frequency capacitors should be placed close to the drain
of the upper MOSFETs and the source of the lower
MOSFETs. Place the output inductor and output
P
P
P
CON_LS
CON_HS
- I
- I
- t
- t
SW_HS
the inductor current minus 1/2 of the inductor
ripple current
inductor current plus 1/2 of the inductor ripple
current
saturation
cut-off
ON
OFF
VALLEY
PEAK
is the time required to drive the device into
≈
is the time required to drive the device into
=
=
I
is the sum of the DC component of the
LOAD
V
--------------------------------------------------------------------- -
I
LOAD
IN
is the difference of the DC component of
⋅
2
I
VALLEY
2
r ⋅
r ⋅
DS ON
DS ON
(
2
(
⋅
t
)_LS
ON
)_HS
⋅
⋅
F
(
SW
⋅
1 D
D
–
+
)
V
----------------------------------------------------------------- -
IN
⋅
I
PEAK
December 22, 2009
2
⋅
t
OFF
(EQ. 45)
(EQ. 46)
(EQ. 47)
FN6899.0
⋅
F
SW