ISL95870BHRZ Intersil, ISL95870BHRZ Datasheet - Page 17

• Manufacturer Part Number: ISL95870BHRZ
• Description: IC CTRLR PWM 1PHASE GPU 20QFN
• Manufacturer: Intersil

Specifications of ISL95870BHRZ

• Applications: Controller, GPU Core Power
• Voltage - Input: 3.3 V ~ 25 V
• Number Of Outputs: 1
• Voltage - Output: 0.5 V ~ 5 V
• Operating Temperature: -10°C ~ 100°C
• Mounting Type: *
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Equations 10, 11, 12 and 13 give the specific V
equations for the ISL95870A setpoint reference voltages.
The ISL95870A V
The ISL95870A V
The ISL95870A V
The ISL95870A V
The V
closure of internal switch SW0 that configures the V
amplifier as a unity-gain voltage follower for the 0.5V
voltage reference V
higher or lower or equal to V
selection of R
recommended to design the four reference voltages in
the following order:
For given four user selected reference voltages V
the following equation needs to be satisfied in order to
have non-zero solution for R
The programmed resistors R
designed in the following way. First, assign an initial
value to R
R
The sum of all the programming resistors should be
approximately 300kΩ, as shown in Equation 17,
otherwise adjust the value of R
calculations.
V
V
V
V
R
R
V
SET2
SET3
SET4
SET1
SET1
SET1
SET2
TABLE 1. ISL95870A VID TRUTH TABLE (Continued)
SET1
- V
- V
R
VID1
SET1
0
SET1
OUT1
SET1
VID STATE
⋅
and R
=
=
=
=
=
=
V
+
V
V
V
V
SET2
R
---------------------------------------------------------------------------------------------------------------------
R
------------------------------------------------------------------- -
REF
REF
REF
REF
SET3
R
SET3
SET3
is fixed at 0.5V because it corresponds to the
< V
< V
SET2
SET2
V
SET1
+
⋅
⋅
⋅
SET4
VID0
⎛
⎜
⎝
⎛
⎜
⎝
⎛
⎜
⎝
V
SET2
OUT2
⋅
⋅
of approximately 100kΩ then calculate
1
1
1
(
(
+
SET3
0
V
V
V
+
+
+
using Equations 15 and 16 respectively.
SET1
SET2
SET3
SET4
REF
R
, R
SET4
SET2
------------------------------------------- -
R
R
------------------------------------------- -
R
------------------
R
–
SET3
REF
SET2
SET1
SET1
SET2
V
SET2
< V
< V
⋅
SET2
⋅
V
R
R
. Theoretically, V
(
setpoint is written as Equation 10:
setpoint is written as Equation 11:
setpoint is written as Equation 12:
setpoint is written as Equation 13:
–
–
V
SET4
SW1, SW3
SET1
SET3
≅
V
V
⎞
⎟
⎠
SET4
SET3
+
+
OUT3
CLOSE
300kΩ
REF
REF
17
and R
R
R
SET3
SET2
–
SETx
SET1
SET4
V
)
)
–
SET2
⋅
< V
< V
V
SET3
(
SET3
V
⎞
⎟
⎠
⎞
⎟
⎠
SET2
ISL95870, ISL95870A, ISL95870B
.
, R
SET2
depending on the
OUT4
SET4
⋅
V
SET2
RESULT
and repeat the
. However, it is
)
V
V
SET3
–
SREF
SET4
SET3
V
Thus,
REF
and R
–
V
SET2
)
can be
SET3
SET
V
V
(EQ. 15)
(EQ. 16)
SETx
⋅
(EQ. 14)
(EQ. 10)
(EQ. 11)
(EQ. 12)
(EQ. 17)
(EQ. 13)
OUT4
V
OUT
SET4
SET
are
,
=
0
FIGURE 10. ISL95870A VOLTAGE PROGRAMMING
If the output voltage is in the range of 0.5V to 1.5V, the
external resistor-divider is not necessary. The output
voltage is equal to one of the reference voltages
depending on the status of VID1 and VID0. The external
resistor divider consisting of R
user to program the output voltage in the range of 1.5V
to 5V. The relation between the output voltage and the
reference voltage is given in Equation 18:
In this case, the four output voltages are equal to each of
the corresponding reference voltages multiplying the
factor k.
Output Voltage Programming for ISL95870B
The ISL95870B allows the user to select four different
reference voltages, thus four different output voltages,
by voltage identification pins VID1 and VID0. The
maximum reference voltage cannot be designed higher
than 1.5V. The implementation scheme is shown in
Figure 11. The setpoint reference voltages are
programmed with resistors that use the naming
convention R
or fourth programming resistor connected in series
starting at the SREF pin and ending at the GND pin. As
shown in Table 2, different combinations of VID1 and
VID0 close different switches and leave other switches
open. For example, for the case of VID1 = 1 and
VID0 = 0, switch SW1 closes and all the other three
switches SW0, SW2 and SW3 are open. For one
combination of VID1 and VID0, the internal switch
V
V
OUT
OUTx
V
OUT
=
=
V
R
V
SREF
FB
SETx
CIRCUIT
SET(x)
⋅
k ⋅
R
--------------------------------- -
FB
SREF
SET0
SET1
R
+
OFS
FB
where (x) is the first, second, third,
R
OFS
=
V
FB
SREF
and R
−
+
k ⋅
EA
SW0
SW1
SW2
SW3
V
SET
OFS
+
−
V
V
December 22, 2009
COMP
allows the
REF
0.5V
(EQ. 18)
(EQ. 19)
FN6899.0