ISL95870BHRZ Intersil, ISL95870BHRZ Datasheet - Page 19

• Manufacturer Part Number: ISL95870BHRZ
• Description: IC CTRLR PWM 1PHASE GPU 20QFN
• Manufacturer: Intersil

Specifications of ISL95870BHRZ

• Applications: Controller, GPU Core Power
• Voltage - Input: 3.3 V ~ 25 V
• Number Of Outputs: 1
• Voltage - Output: 0.5 V ~ 5 V
• Operating Temperature: -10°C ~ 100°C
• Mounting Type: *
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

High Output Voltage Programming
The ISL95870 has a fixed 0.5V reference voltage
(V
divider consisting of R
(R
ratio resistor divider is noise sensitive and the PCB layout
should be carefully routed. It is recommended to use
small value resistor divider such as R
In general the ISL95870A and ISL95870B have much
better jitter performance than the ISL95870 when the
output voltage is in the range of 3.3V to 5V, particularly
in DCM. This is because V
and a smaller ratio resistor divider can be used. This
makes the singal to noise ratio at FB pin much better. So
for 3.3V to 5V output, the ISL95870A and ISL95870B are
recommended with V
R4 Modulator
The R
technology. Like R
frequency in response to load transients and maintains
the benefits of current-mode hysteretic controllers.
However, in addition, the R
output impedance and uses accurate referencing to
eliminate the need for a high-gain voltage amplifier in
the compensation loop. The result is a topology that can
be tuned to voltage-mode hysteretic transient speed
while maintaining a linear control model and removes the
need for any compensation. This greatly simplifies the
regulator design for customers and reduces external
component cost.
Stability
The removal of compensation derives from the R
modulator’s lack of need for high DC gain. In traditional
architectures, high DC gain is achieved with an
integrator in the voltage loop. The integrator introduces
a pole in the open-loop transfer function at low
frequencies. That, combined with the double-pole from
the output L/C filter, creates a three pole system that
must be compensated to maintain stability.
Classic control theory requires a single-pole transition
through unity gain to ensure a stable system.
Current-mode architectures (includes peak, peak-valley,
current-mode hysteretic, R
or near the L/C resonant point, effectively canceling one
of the system’s poles. The system still contains two
poles, one of which must be canceled with a zero before
unity gain crossover to achieve stability. Compensation
components are added to introduce the necessary zero.
SREF
FB
:R
4
). For high output voltage application, the resistor
OFS
modulator is an evolutionary step in R
= 9:1 for 5V output). The FB pin with large
3
, the R
SREF
FB
and R
SREF
19
4
set to 1.5V.
4
3
modulator allows variable
modulator reduces regulator
and R
OFS
voltage can be set to 1.5V
ISL95870, ISL95870A, ISL95870B
4
requires large ratio
) generate a zero at
FB
=1kΩ.
3
4
FIGURE 14. NON-INTEGRATED R4 ERROR-AMPLIFIER
FIGURE 12. INTEGRATOR ERROR-AMPLIFIER
Figure 12 illustrates the classic integrator configuration
for a voltage loop error-amplifier. While the integrator
provides the high DC gain required for accurate
regulation in traditional technologies, it also introduces a
low-frequency pole into the control loop. Figure 13 shows
the open-loop response that results from the addition of
an integrating capacitor in the voltage loop. The
compensation components found in Figure 12 are
necessary to achieve stability.
Because R
the integrator can be removed, reducing the number of
inherent poles in the loop to two. The current-mode zero
continues to cancel one of the poles, ensuring a
single-pole crossover for a wide range of output filter
choices. The result is a stable system with no need for
compensation components or complex equations to
properly tune the stability.
FIGURE 13. UNCOMPENSATED INTEGRATOR
COMPENSATION TO COUNTER
V
INTEGRATOR POLE
V
OUT
V
CURRENT-MODE
OUT
R3 LOOP GAIN (dB)
p1
4
ZERO
does not require a high-gain voltage loop,
CONFIGURATION
CONFIGURATION
OPEN-LOOP RESPONSE
INTEGRATOR POLE
R1
V
p2
z1
DAC
L/C DOUBLE-POLE
V
p3
DAC
R2
REQUIRED FOR STABILITY
ADD z2 IS NEEDED
COMPENSATOR TO
-20dB CROSSOVER
FOR HIGH DC GAIN
INTEGRATOR
December 22, 2009
f (Hz)
V
COMP
V COMP
V COMP
FN6899.0