ISLA110P50IR72EV1Z Intersil, ISLA110P50IR72EV1Z Datasheet - Page 19

• Manufacturer Part Number: ISLA110P50IR72EV1Z
• Description: EVAL BOARD FOR ISLA110P50IR72
• Manufacturer: Intersil

Specifications of ISLA110P50IR72EV1Z

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

I2E Requirements and
Restrictions
Overview
I2E is a blind and background capable algorithm,
designed to transparently eliminate interleaving
artifacts. This circuitry eliminates interleave artifacts
due to offset, gain, and sample time mismatches
between unit A/Ds, and across supply voltage and
temperature variations in real-time.
Differences in the offset, gain, and sample times of
time-interleaved A/Ds create artifacts in the digital
outputs. Each of these artifacts creates a unique
signature that may be detectable in the captured
samples. The I2E algorithm optimizes performance by
detecting error signatures and adjusting each unit A/D
using minimal additional power.
The I2E algorithm can be put in Active Run state via SPI.
When the I2E algorithm is in Active Run state, it detects
and corrects for offset, gain, and sample time
mismatches in real time (see Track Mode description).
However, certain analog input characteristics can obscure
the estimation of these mismatches. The I2E algorithm is
capable of detecting these obscuring analog input
characteristics, and as long as they are present I2E will
stop updating the correction in real time. Effectively, this
freezes the current correction circuitry to the last
known-good state (see Hold Mode description). Once the
analog input signal stops obscuring the interleaved
artifacts, the I2E algorithm will automatically start
correcting for mismatch in real time again.
Active Run State
During the Active Run state the I2E algorithm actively
suppresses artifacts due to interleaving based on
statistics in the digitized data. I2E has two modes of
operation in this state (described below), dynamically
chosen in real-time by the algorithm based on the
statistics of the analog input signal.
Track Mode refers to the default state of the algorithm,
when all artifacts due to interleaving are actively being
eliminated. To be in Track Mode the analog input signal to
the device must adhere to the following requirements:
• Posses total power greater than -20dBFS, integrated
The criteria above assumes 500MSPS operation; the
frequency bands should be scaled proportionally for
lower sample rates. Note that the effect of excluding
energy in the 100kHz band around of f
Nyquist zone. This band generalizes to the form
(N*f
integer. An input signal that violates these criteria briefly
(approximately 10µs), before and after which it meets
this criteria, will not impact system performance.
from 1MHz to Nyquist but excluding signal energy in
a 100kHz band centered at f
S
/4-50kHz) to (N*f
S
/4+50kHz), where N is any odd
19
S
/4
S
/4 exists in every
ISLA110P50
The algorithm must be in Track Mode for approximately
one second (defined as I2Epost_t in the specification
table on page 7) after power-up before the specifications
apply. Once this requirement has been met, the
specifications of the device will continue to be met while
I2E remains in Track Mode, even in the presence of
temperature and supply voltage changes.
Hold Mode refers to the state of the I2E algorithm when
the analog input signal does not meet the requirements
specified above. If the algorithm detects that the signal
no longer meets the criteria, it automatically enters Hold
Mode. In Hold Mode, the I2E circuitry freezes the
adjustment values based on the most recent set of valid
input conditions. However, in Hold Mode, the I2E circuitry
will not correct for new changes in interleave artifacts
induced by supply voltage and temperature changes. The
I2E circuitry will remain in Hold Mode until such time as
the analog input signal meets the requirements for Track
Mode.
Power Meter
The power meter calculates the average power of the
analog input, and determines if it’s within range to allow
operation in Track Mode. Both AC RMS and total RMS
power are calculated, and there are separate SPI
programmable thresholds and hysteresis values for each.
FS/4 Filter
A digital filter removes the signal energy in a 100kHz
band around f
samples for estimating offset, gain, and sample time
mismatches (data samples produced by the A/D are
unaffected by this filtering). This allows the I2E algorithm
to continue in Active Run state while in the presence of a
large amount of input energy near the f
This filter can be powered down if it’s known that the
signal characteristics won’t violate the restrictions.
Powering down the FS/4 filter will reduce power
consumption by approximately 70mW.
Nyquist Zones
The I2E circuitry allows the use of any one Nyquist zone
without configuration, but requires the use of only one
Nyquist zone. Inputs that switch dynamically between
Nyquist zones will cause poor performance for the I2E
circuitry. For example, I2E will function properly for a
particular application that has f
the 1
function properly for an application that uses
f
500MHz). I2E will not function properly for an application
that uses f
from 150MHz to 210MHz and 250MHz to 290MHz
simultaneously. There is no need to configure the I2E
algorithm to use a particular Nyquist zone, but no
dynamic switching between Nyquist zones is permitted
while I2E is running.
S
= 500MSPS and the 2
st
Nyquist zone (0MHz to 250MHz). I2E will also
S
= 500MSPS, and input frequency bands
S
/4 before the I2E circuitry uses these
nd
Nyquist zone (250MHz to
S
= 500MSPS and uses
S
/4 frequency.
June 4, 2010
FN7606.1