CS43L43-KZZ Cirrus Logic Inc, CS43L43-KZZ Datasheet - Page 24

• Manufacturer Part Number: CS43L43-KZZ
• Description: IC,D/A CONVERTER,DUAL,16/18/20/24-BIT,TSSOP,16PIN
• Manufacturer: Cirrus Logic Inc

Specifications of CS43L43-KZZ

• Rohs Compliant: YES

5.11 MODE CONTROL 2 (ADDRESS 0BH)
24
MCLKDIV
DIF2
5.11.1 MASTER CLOCK DIVIDE ENABLE (MCLKDIV)
5.11.2 DIGITAL INTERFACE FORMAT (DIF)
0
0
0
0
1
1
1
1
Function:
Function:
7
0
Default = 0
0 - Disabled
1 - Enabled
The MCLKDIV bit enables a circuit which divides the externally applied MCLK signal by 2 prior to all other
internal circuitry.
NOTE: Internal SCLK is not available when this function is enabled.
Default = 000 - Format 0 (I
The required relationship between the Left/Right clock, serial clock and serial data is defined by the Digital
Interface Format and the options are detailed in Figures 2-4.
NOTE: Internal SCLK is not available when MCLKDIV is enabled.
RESERVED
DIF1
0
0
1
1
0
0
1
1
6
0
DIF0
0
1
0
1
0
1
0
1
RESERVED
Table 14. Digital Interface Format - Control Port Mode
5
0
I
I
Left Justified, up to 24-bit data,
Right Justified, 24-bit data
Right Justified, 20-bit data
Right Justified, 16-bit data
Right Justified, 18-bit data
Identical to Format 1
2
2
2
S, up to 24-bit data, 64 x Fs Internal SLCK)
S, up to 24-bit data, 64 x Fs Internal SLCK
S, up to 16-bit data, 32 x Fs Internal SLCK
RESERVED
4
0
BIT 0-2
DESCRIPTION
RESERVED
BIT 7
3
0
DIF2
2
0
Format
DIF1
0
1
2
3
4
5
6
1
1
0
CS43L43
FIGURE
DS479PP3
DIF0
2
2
3
4
4
4
4
2
0
0