PIC18LF8490-I/PT Microchip Technology, PIC18LF8490-I/PT Datasheet - Page 13

• Manufacturer Part Number: PIC18LF8490-I/PT
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,80PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF8490-I/PT

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, LCD, POR, PWM, WDT
• Number Of I /o: 66
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: SPI, I2C, EUSART, AUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 66
• Number Of Timers: 1 x 8
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163028
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

35. Module: Reset
36. Module: Power-up Timer
© 2007 Microchip Technology Inc.
This version of silicon does not support the func-
tionality described in Note 1 of parameter D002 in
Section 26.1 “DC Characteristics: Supply
Voltage” of the data sheet. The RAM content may
be altered during a Reset event if following
conditions are met.
• Device is accessing RAM.
• Asynchronous Reset (i.e., WDT, BOR or MCLR
Work around
None
Date Codes that pertain to this issue:
All engineering and production devices.
If Brown-out Reset (BOR) is disabled, then the
Power-up Timer (PWRT) gets disabled irrespec-
tive of the state of the PWRTEN Configuration bit
(CONFIG2L<0>).
Work around
Do either of the following:
1. Enable the BOR using any desired mode and
2. If BOR operation is not desired:
Date Codes that pertain to this issue:
All engineering and production devices.
occurs when a write operation is being
executed (start of a Q4 cycle).
set point.
a) Configure the BOR using
b) Configure the BOR for the lowest voltage
c) When code execution begins following
BOREN<1:0> = 01 (CONFIG2L<2:1>).
BOR is controlled by SBOREN.
set point by clearing the BORV<1:0> bits
(CONFIG2L<4:3>).
In this configuration, the SBOREN bit
resets to ‘1’, enabling the BOR.
all Resets, disable the BOR by clearing
the SBOREN bit (RCON<6>).
PIC18F6390/6490/8390/8490
37. Module: Analog-to-Digital (A/D)
When the A/D clock source is selected as 2 T
or RC (when ADCS2:ADCS0 = 000 or x11), in
extremely rare cases, the E
Error) and E
exceed the data sheet specification at codes 511
and 512 only.
Work around
Select a different A/D clock source (4 T
8 T
selecting the 2 T
Date Codes that pertain to this issue:
All engineering and production devices.
OSC
, 16 T
Converter Module
OSC
DL
OSC
(Differential Linearity Error) may
, 32 T
or RC modes.
OSC
or 64 T
IL
(Integral Linearity
DS80207F-page 13
OSC
) and avoid
OSC
OSC
,