AD7707BR Analog Devices Inc, AD7707BR Datasheet - Page 15

• Manufacturer Part Number: AD7707BR
• Description: A/D Converter (A-D) IC
• Manufacturer: Analog Devices Inc

Specifications of AD7707BR

• Peak Reflow Compatible (260 C): No
• No. Of Bits: 16 Bit
• Leaded Process Compatible: No
• Mounting Type: Surface Mount
• Features: 3V/5V, 1mW, 2?Channel, 16?Bit
• Package / Case: 20-SOIC
• Rohs Status: RoHS non-compliant
• Number Of Bits: 16
• Sampling Rate (per Second): 500
• Data Interface: DSP, MICROWIRE™, QSPI™, Serial, SPI™
• Number Of Converters: 1
• Power Dissipation (max): 1mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

OUTPUT NOISE FOR LOW LEVEL INPUT
CHANNELS (3 V OPERATION)
Table 9 shows the AD7707 output rms noise and peak-to-peak
resolution in unbuffered mode for the selectable notch and
−3 dB frequencies for the part, as selected by FS0, FS1, and FS2
of the clock register. The numbers given are for the bipolar
input ranges with a V
numbers are typical and are generated at an analog input
voltage of 0 V. Table 10 shows the rms noise and peak-to-peak
resolution when operating in buffered mode. It is important to
note that the peak-to-peak numbers represent the resolution for
which there is no code flicker. They are not calculated based on
rms noise but on peak-to-peak noise. The numbers given are
for bipolar input ranges with a V
buffered or unbuffered mode. These numbers are typical and
Table 9. Output RMS Noise/Peak-to-Peak Resolution vs. Gain and Output Update Rate @ 3 V AIN1 and AIN2 Unbuffered Mode Only
Filter First Notch
and Output Data
Rate
MCLK IN = 2.4576 MHz
10 Hz
50 Hz
60 Hz
250 Hz
500 Hz
MCLK IN = 1 MHz
4.05 Hz
20 Hz
25 Hz
100 Hz
200 Hz
Table 10. Output RMS Noise/Peak-to-Peak Resolution vs. Gain and Output Update Rate @ 3 V AIN1 and AIN2 Buffered Mode Only
Filter First Notch
and Output Data
Rate
MCLK IN = 2.4576 MHz
10 Hz
50 Hz
60 Hz
250 Hz
500 Hz
MCLK IN = 1 MHz
4.05 Hz
20 Hz
25 Hz
100 Hz
200 Hz
2.62 Hz
13.1 Hz
15.72 Hz
5.24 Hz
6.55 Hz
−3 dB
Frequency
2.62 Hz
13.1 Hz
15.72 Hz
65.5 Hz
131 Hz
1.06 Hz
5.24 Hz
6.55 Hz
26.2 Hz
52.4 Hz
−3 dB
Frequency
65.5 Hz
131 Hz
1.06 Hz
26.2 Hz
52.4 Hz
REF
of 1.225 V and an AV
Gain of 1
1.60 (16)
3.8 (16)
4.4 (16)
53 (13)
300 (10.5)
1.56 (16)
3.85 (16)
4.56 (16)
45.7 (13)
262 (10.5)
Gain of 1
1.80 (16)
4.1 (16)
5.1 (16)
50 (13)
275 (10.5)
1.75 (16)
4.21 (16)
5.15 (16)
46.1 (13)
282 (10.5)
REF
of 1.225 V and for either
3 (16)
Gain of 2
0.8 (16)
1.9 (16)
2.2 (16)
24 (13)
138 (10.5)
0.88 (16)
2.02 (16)
2.4 (16)
22 (13)
125 (10.5)
Gain of 2
1 (16)
2.4 (16)
27 (13)
125 (10.5)
1.18 (16)
2.5 (16)
2.8 (16)
24.3 (13)
123 (10.5)
DD
= 3 V. These
Typical Output RMS Noise in μV (Peak-to-Peak Resolution in Bits)
Typical Output RMS Noise in μV (Peak-to-Peak Resolution in Bits)
Gain of 4
0.48 (16)
1.1 (16)
1.35 (16)
15 (13)
80 (10.5)
0.52 (16)
1.15 (16)
1.4 (16)
13.7 (13)
66 (10.5)
Gain of 4
0.7 (16)
1.5 (16)
1.8 (16)
12.3 (13)
80 (10.5)
0.67 (16)
1.48 (16)
1.8 (16)
13.6 (13)
66 (10.5)
Rev. B | Page 15 of 52
Gain of 8
0.29 (16)
0.64 (16)
0.78 (16)
6.8 (13)
34 (10.5)
0.3 (16)
0.74 (16)
0.79 (16)
5.27 (13)
32.4 (10.5)
1 (15.5)
1.1 (15.5)
6.4 (13)
Gain of 8
0.41 (16)
39 (10.5)
0.44 (16)
1 (15.5)
1.15 (15.5)
6.71 (13)
35.3 (10.5)
are rounded to the nearest LSB. The numbers apply for the
CLKDIV bit of the clock register set to 0. The output noise
comes from two sources. The first is the electrical noise in the
semiconductor devices (device noise) used in the implementa-
tion of the modulator. Secondly, when the analog input is
converted into the digital domain, quantization noise is added.
The device noise is at a low level and is independent of fre-
quency. The quantization noise starts at an even lower level but
rises rapidly with increasing frequency to become the dominant
noise source. The numbers in Table 9 and Table 10 are given
for the bipolar input ranges. For the unipolar ranges, the rms
noise numbers are the same as the bipolar range but the peak-
to-peak resolution is now based on half the signal range, which
effectively means losing 1 bit of resolution.
Gain of 16
0.29 (16)
0.60 (15.5)
0.7 (15)
3.6 (12.5)
18 (10.5)
0.28 (16)
0.63 (15.5)
0.68 (15)
2.64 (13)
18.4 (10.5)
Gain of 16
0.41 (16)
0.91 (15)
0.94 (14.5)
4 (12.5)
16 (10.5)
0.41 (16)
0.94 (15)
1 (14.5)
4.1 (12.5)
14.8 (10.5)
Gain of 32
0.27 (15.5)
0.6 (14.5)
0.68 (14.5)
2.1 (12.5)
8.7 (10.5)
0.27 (15.5)
0.57 (14.5)
0.66 (14.5)
2 (12.5)
8.6 (10.5)
Gain of 32
0.41 (15)
0.89 (14)
0.94 (13.5)
2.7 (12.5)
8.9 (10.5)
0.44 (15)
0.96 (14)
1.02 (13.5)
2.54 (12.5)
9.91 (10.5)
Gain of 64
0.26 (14.5)
0.6 (13.5)
0.64 (13.5)
1.5 (12)
4.8 (10)
0.27 (14.5)
0.61 (13.5)
0.64 (13.5)
1.59 (12)
4.64 (10.5)
Gain of 64
0.41 (14)
0.86 (13)
0.99 (13)
2.2 (11.5)
5.2 (10)
0.43 (14)
0.89 (13)
0.96 (13)
2.3 (11.5)
5.48 (10)
AD7707
Gain of 128
0.26 (13.5)
0.6 (12.5)
0.64 (12.5)
1.3 (11)
3.4 (10)
0.26 (13.5)
0.58 (12.5)
0.64 (12.5)
1.4 (11)
3.3 (10)
Gain of 128
0.41 (13)
0.83 (12)
0.99 (11.5)
1.8 (11)
4.2 (9.5)
0.43 (13)
0.86 (12)
1.03 (11.5)
2.15 (10.5)
4.01 (9.5)