AD7821KPZ Analog Devices Inc, AD7821KPZ Datasheet - Page 3

• Manufacturer Part Number: AD7821KPZ
• Description: 8-BIT ATC CONVERTER IC
• Manufacturer: Analog Devices Inc

Specifications of AD7821KPZ

• Number Of Bits: 8
• Sampling Rate (per Second): 1M
• Data Interface: Parallel
• Number Of Converters: 3
• Power Dissipation (max): 50mW
• Voltage Supply Source: Dual ±
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-LCC (J-Lead)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REV. B
TIMING CHARACTERISTICS
Parameter
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
NOTES
1
2
3
4
Specifications subject to change without notice.
Test Circuits
CSS
CSH
RDY
CRD
ACC0
INTH
DH
P
WR
RD
READ1
ACC1
RI
INTL
READ2
ACC2
IHWR
ID
Sample tested at +25°C to ensure compliance. All input control signals are specified with t
C
Measured with load circuits of Figure 1 and defined as the time required for an output to cross 0.8 V or 2.4 V.
Defined as the time required for the data lines to change 0.5 V when loaded with the circuits of Figure 2.
L
3
4
= 50 pF.
2
2
3
2
3
3
2
Figure 1. Load Circuits for Data Access Time Test
Figure 2. Load Circuits for Data Hold Time Test
a. High Z to V
a. V
OH
Limit at +25 C
(All Versions)
0
0
70
700
t
t
50
80
15
60
350
250
10
250
160
160
185
150
380
500
65
65
90
80
30
45
CRD
CRD
to High Z
+ 25
+ 50
OH
Limit at
T
(K, B Versions)
0
0
85
875
t
t
–
85
15
70
425
325
10
350
205
205
235
185
–
610
75
75
110
100
35
60
CRD
CRD
MIN
1
, T
+ 30
+ 65
b. High Z to V
b. V
(V
DD
MAX
= +5 V
OL
to High Z
5%, V
Limit at
T
0
0
100
975
t
t
–
90
15
80
500
400
10
450
240
240
275
220
–
700
85
85
130
120
40
70
(T Version)
OL
CRD
CRD
MIN
SS
, T
+ 35
+ 75
RISE
= 0 V or –5 V
MAX
–3–
= t
FALL
Model
AD7821KN –40°C to +85°C
AD7821KP
AD7821KR –40°C to +85°C
AD7821BQ –40°C to +85°C
AD7821TQ –55°C to +125°C ± 1 max
AD7821TE
NOTES
1
2
To order MIL-STD-883, Class B processed parts, add /883B to part
number. Contact local sales office for military data sheet.
E = Leadless Ceramic Chip Carrier; N = Plastic DIP; P = Plastic Leaded
Chip Carrier; Q = Cerdip; R = SOIC.
= 5 ns (10% to 90% of +5 V) and timed from a voltage level of 1.6 V.
Unit
ns min
ns min
ns max
ns max
ns max
ns max
ns typ
ns max
ns min
ns max
ns min
ns min
µs max
ns min
ns min
ns max
ns max
ns max
ns typ
ns max
ns min
ns max
ns max
ns max
ns max
ns max
1
5%; Unipolar or Bipolar Input Range)
Temperature
Range
–40°C to +85°C
–55°C to +125°C ± 1 max
ORDERING GUIDE
Conversion Time (RD Mode)
Data Hold Time
Delay Time Between Conversions
Write Pulsewidth
Delay Time between WR and RD Pulses
Conditions/Comments
CS to RD/WR Setup Time
CS to RD/WR Hold Time
CS to RDY Delay. Pull-Up
Resistor 5 kΩ
Data Access Time (RD Mode)
C
C
RD to INT Delay (RD Mode)
RD Pulsewidth (WR-RD Mode, see Figure 12b)
Determined by t
Data Access Time (WR-RD Mode, see Figure 12b)
C
C
RD to INT Delay
WR to INT Delay
RD Pulsewidth (WR-RD Mode, see Figure 12a)
Determined by t
Data Access Time (WR-RD Mode, see Figure 12a)
C
C
WR to INT Delay (Stand-Alone Operation)
Data Access Time after INT
(Stand-Alone Operation)
C
C
L
L
L
L
L
L
L
L
= 20 pF
= 100 pF
= 20 pF
= 100 pF
= 20 pF
= 100 pF
= 20 pF
= 100 pF
ACC1
ACC2
Total
Unadjusted
Error (LSB) Option
± 1 max
± 1 max
± 1 max
± 1 max
Package
N-20
P-20A
RW-20
Q-20
Q-20
E-20A
AD7821
2