CS4299-JQZR Cirrus Logic Inc, CS4299-JQZR Datasheet - Page 31

• Manufacturer Part Number: CS4299-JQZR
• Description: IC AC97 Codec With SRC
• Manufacturer: Cirrus Logic Inc
• Series: SoundFusion™r
• Type: Audio Codec '97r

Specifications of CS4299-JQZR

• Data Interface: Serial
• Resolution (bits): 18 b, 20 b
• Number Of Adcs / Dacs: 1 / 1
• Sigma Delta: Yes
• Dynamic Range, Adcs / Dacs (db) Typ: 85 / 87
• Voltage - Supply, Analog: 4.75 V ~ 5.25 V
• Voltage - Supply, Digital: 3.3 V ~ 5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• No. Of Dacs: 1
• No. Of Input Channels: 6
• No. Of Output Channels: 2
• Adc / Dac Resolution: 20bit
• Adcs / Dacs Signal To Noise Ratio: 70dB
• Sampling Rate: 48kSPS
• Supply Voltage Range: 3.135V To 3.465V, 4.75V To 5.25V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

DS319PP6
4.20
SPEN
Val
Fs
L
CC[6:0]
Emph
Copy
/Audio
Pro
Default
For a further discussion of the proper use of the channel status bits see application note AN22: Overview of Digital
Audio Interface Data Structures [3].
SPEN
D15
S/PDIF Control Register (Index 68h)
D14
Val
D13
0
S/PDIF Enable. The SPEN bit enables S/PDIF data transmission on the S/PDIF_OUT pin.
The SPEN bit routes the left and right channel data from the AC ’97 controller, the digital mix-
er, or the digital effects engine to the S/PDIF transmitter block. The actual data routed to the
S/PDIF block is controlled through the AMAP/SM[1:0] configuration in the AC Mode Control
Register (Index 5Eh).
Validity. The V bit is mapped to the V bit (bit 28) of every sub-frame. If this bit is ‘0’, the signal
is suitable for conversion or processing.
Sample Rate. The Fs bit indicates the sampling rate for the S/PDIF data. The inverse of this
bit is mapped to bit 25 of the channel status block. When the Fs bit is ‘clear’, the sampling
frequency is 48 kHz. When ‘set’, the sampling frequency is 44.1 kHz. The actual rate at which
S/PDIF data are being transmitted solely depends on the master clock frequency of the
CS4299. The Fs bit is merely an indicator to the S/PDIF receiver.
Generation Status. The L bit is mapped to bit 15 of the channel status block. For category
codes 001xxxx, 0111xxx and 100xxxx, a value of ‘0’ indicates original material and a value of
‘1’ indicates a copy of original material. For all other category codes the definition of the L bit
is reversed.
Category Code. The CC[6:0] bits are mapped to bits 8-14 of the channel status block.
Data Emphasis. The Emph bit is mapped to bit 3 of the channel status block. If the Emph bit
is ‘1’, 50/15us filter pre-emphasis is indicated. If the bit is ‘0’, no pre-emphasis is indicated.
Copyright. The Copy bit is mapped to bit 3 of the channel status block. If the Copy bit is ‘1’
copyright is not asserted and copying is permitted.
Audio / Non-Audio. The /Audio bit is mapped to bit 1 of the channel status block. If the /Audio
bit is ‘0’, the data transmitted over S/PDIF is assumed to be digital audio. If the /Audio bit is
‘1’, non-audio data is assumed.
bit is ‘0’, consumer use of the audio control block is indicated. If the bit is ‘1’, professional use
is indicated.
0000h
Professional/Consumer. The Pro bit is mapped to bit 0 of the channel status block. If the Pro
D12
Fs
D11
L
CC6
D10
CC5
D9
CC4
D8
CC3
D7
CC2
D6
CC1
D5
CC0
D4
Emph Copy /Audio
D3
D2
CS4299
D1
CS4299
Pro
D0
31
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