CS42L51-CNZR Cirrus Logic Inc, CS42L51-CNZR Datasheet - Page 33

• Manufacturer Part Number: CS42L51-CNZR
• Description: IC LV Stereo Codec F/Digital Audio Apps
• Manufacturer: Cirrus Logic Inc
• Type: Stereo Audior

Specifications of CS42L51-CNZR

• Data Interface: PCM Audio Interface
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: Yes
• Dynamic Range, Adcs / Dacs (db) Typ: 98 / 98
• Voltage - Supply, Analog: 1.8V, 2.5V
• Voltage - Supply, Digital: 1.8V, 2.5V
• Operating Temperature: -10°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 32-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1005 - BOARD EVAL FOR CS42L51 CODEC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: Q3956082

DS679F1
4.3.8
Noise Gate
The noise gate may be used to mute signal levels that fall below a programmable threshold. This prevents
the ALC from applying gain to noise. A programmable delay may be used to set the minimum time before
the noise gate attacks the signal.
Maximum noise gate attenuation levels will depend on the gain applied in either the PGA or MIC pre-am-
plifier. For example: If both +32 dB pre-amplification and +12 dB programmable gain is applied, the max-
imum attenuation that the noise gate achieves will be 52 dB (-96 + 32 + 12) below full-scale.
Ramp-down time to the maximum setting is affected by the SOFTx bit.
Recommended settings: For best results, enable soft ramp for the digital attenuator. When the analog in-
puts are configured for differential signals (see
to trigger the noise gate only when both inputs fall below the threshold.
Software
Controls:
“Noise Gate Configuration & Misc. (Address 1Fh)” on page
page
54.
Output
(dB)
-96
Figure 12. Noise Gate Attenuation
THRESH[2:0]
“Differential Inputs” on page
-40
-52 dB
-64 dB
-80 dB
Input (dB)
72,
“ADC Control (Address 06h)” on
29), enable the NG_ALL bit
CS42L51
33