CS5534-BSZR Cirrus Logic Inc, CS5534-BSZR Datasheet
CS5534-BSZR
Specifications of CS5534-BSZR
Related parts for CS5534-BSZR
CS5534-BSZR Summary of contents
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... To accommodate these applications, the ADCs come as either two-channel (CS5532) or four-channel (CS5534) devices and include a very low-noise, chopper-stabilized instrumentation amplifier (6 nV/√Hz @ 0.1 Hz) with se- lectable gains of 1×, 2×, 4×, 8×, 16×, 32×, and 64×. ...
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TABLE OF CONTENTS 1. CHARACTERISTICS AND SPECIFICATIONS ..........................................................4 ANALOG CHARACTERISTICS..........................................................................4 TYPICAL RMS NOISE (NV) ...............................................................................7 TYPICAL NOISE-FREE RESOLUTION(BITS) ................................................... DIGITAL CHARACTERISTICS .................................................................... DIGITAL CHARACTERISTICS ....................................................................8 DYNAMIC CHARACTERISTICS ........................................................................9 ABSOLUTE MAXIMUM RATINGS .....................................................................9 SWITCHING CHARACTERISTICS ..................................................................10 2. ...
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... Figure 23. CS5532 Configured with ±3 V Analog Supplies..................................................... 41 Figure 24. CS5532 Configured for Thermocouple Measurement ........................................... 42 Figure 25. Bridge with Series Resistors .................................................................................. 42 LIST OF TABLES Table 1. Conversion Timing – Single Mode ............................................................................ 34 Table 2. Conversion Timing – Continuous Mode .................................................................... 35 Table 3. Command Byte Pointer ............................................................................................. 35 Table 4. Output Coding for 24-bit CS5532 and CS5534......................................................... 37 DS755F3 CS5532/34-BS 3 ...
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CHARACTERISTICS AND SPECIFICATIONS ANALOG CHARACTERISTICS (VA+, VD ±5%; VREF VA-, VREF-, DGND = 0 V; MCLK = 4.9152 MHz; OWR (Output Word Rate Sps; Bipolar Mode; Gain = 32) (See Notes ...
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ANALOG CHARACTERISTICS (See Notes 1 and 2.) Parameter Analog Input Common Mode + Signal on AIN+ or AIN-Bipolar/Unipolar Mode CVF Current on AIN+ or AIN- Input Current Noise Input Leakage for Mux when Off (at 25 °C) Off-channel Mux Isolation ...
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ANALOG CHARACTERISTICS (See Notes 1 and 2.) Parameter Power Supplies DC Power Supply Currents (Normal Mode) Power Consumption Normal Mode Standby Sleep Power Supply Rejection dc Positive Supplies dc Negative Supply 8. All outputs unloaded. All input CMOS levels. 9. ...
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TYPICAL RMS NOISE (nV) (See notes 11, 12, 13 and 14) Output Word -3 dB Filter Rate (Sps) Frequency (Hz) 7.5 1.94 15 3.88 30 7.75 60 15.5 120 31 240 62 480 122 960 230 1,920 390 3,840 780 ...
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V DIGITAL CHARACTERISTICS (VA+, VD ±5%; VA-, DGND = 0 V; See Notes 2 and 17.) Parameter High-level Input Voltage Low-level Input Voltage High-level Output Voltage A0 and A1, I Low-level Output Voltage A0 and A1, ...
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DYNAMIC CHARACTERISTICS Parameter Modulator Sampling Rate Filter Settling Time to 1/2 LSB (Full Scale Step Input) Single Conversion mode (Notes 18, 19, and 20) Continuous Conversion mode, OWR < 3200 Sps Continuous Conversion mode, OWR ≥ 3200 Sps 18. The ...
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SWITCHING CHARACTERISTICS (VA ±5%; VA- = -2.5V± VD+ = 3.0 V ±10 ±5%;DGND = 0 V; Levels: Logic Logic ...
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DS755F3 Figure 1. SDI Write Timing ...
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... To accommodate these applications, the ADCs come as either two-channel (CS5532) or four-chan- nel (CS5534) devices and include a very-low- noise, chopper-stabilized, programmable-gain in- strumentation amplifier (PGIA, 6 nV/√Hz @ 0.1 Hz) with selectable gains of 1×, 2×, 4×, 8×, 16× ...
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MHz). The common-mode plus signal range of the instru- mentation amplifier is (VA (VA+) - 1.7 V. Figure 4 illustrates the input models for the ...
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... Each of the converters has 32-bit registers to func- tion as offset and gain calibration registers for each channel. The CS5532 has two offset and two gain calibration registers, the CS5534 has four offset and four gain calibration registers. These registers Offset Registers (4 x 32) ...
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Setups. Using the single conversion mode, an 8-bit com- mand word can be written into the serial port. The command includes pointer bits which ‘point’ to ...
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RS=0) into the configuration register after performing a reset. The change in the reset sequence to include writing the RS bit back to 0 insures the clearing of the RS bit in the event that a ...
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... MSB first with physical channel 0 accessed first followed by physical channel 1 next and so forth. CS1-CS0 provide the address of one of the two (four for CS5534) physical input channels. These bits are also used to access the calibration registers associated with the respective physical input channel. Note that these bits are ignored when reading data register ...
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... These commands are used to access each offset register separately. CS1 - CS0 decode the registers accessed. R/W (Read/Write) 0 Write to selected register. 1 Read from selected register. CS[1:0] (Channel Select Bits) 00 Offset Register 1 01 Offset Register 2 10 Offset Register 3 (CS5534 only) 11 Offset Register 4 (CS5534 only R R/W D5 ...
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... Read from selected register. CS[1:0] (Channel Select Bits) 00 Gain Register 1 01 Gain Register 2 10 Gain Register 3 (CS5534 only) 11 Gain Register 4 (CS5534 only) READ/WRITE INDIVIDUAL CHANNEL-SETUP REGISTER D7(MSB Function These commands are used to access each channel-setup register separately. CS1 - CS0 de- code the registers accessed. ...
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PERFORM CONVERSION D7(MSB CSRP2 Function: These commands instruct the ADC to perform either a single, fully-settled conversion or con- tinuous conversions on the physical input channel pointed to by the pointer bits (CSRP2 - CRSP0) in the ...
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PERFORM CALIBRATION D7(MSB CSRP2 Function: These commands instruct the ADC to perform a calibration on the physical input channel se- lected by the setup register which is chosen by the command byte pointer bits (CSRP2 - CSRP0). ...
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Serial Port Interface The CS5532/34’s serial interface consists of four control lines: CS, SDI, SDO, SCLK. Figure 7 de- tails the command and data word timing. CS, Chip Select, is the control line which enables access to the serial ...
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... CS5534, there are four gain and offset registers. There are four channel setup registers in both devices example, to write 0x80000000 (hexadecimal) to all four gain registers in the CS5534, the user would transmit the command 0x42 (hexadecimal) followed by four it- erations of 0x80000000 (hexadecimal), (i.e. 0x42 followed ...
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The on-chip registers are initialized to the following default states: Configuration Register: 00000000(H) Offset Registers: 00000000(H) Gain Registers: 01000000(H) Channel Setup Registers: 00000000(H) After reset, the RS bit should be written back to logic 0 to complete ...
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Fine 1 φ Coarse 2 VREF C = 14pF ≤ MCLK VRS = ≤ V Figure 9. Input Reference Model when VRS = ...
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Configuration Register Descriptions D31(MSB) D30 D29 D28 D27 PSS PDW RS RV D15 D14 D13 D12 D11 PSS (Power Save Select)[31] 0 Standby Mode (Oscillator active, allows quick power-up). 1 Sleep Mode (Oscillator inactive). ...
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Filter Rate Select, FRS[19] 0 Use the default output word rates. 1 Scale all output word rates and their corresponding filter characteristics by a factor of 5/6. NU (Not Used)[18:0] 0 Must always be logic 0. Reserved for future upgrades. ...
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... Select physical channel 2 10 Select physical channel 3 (CS5534 only) 11 Select physical channel 4 (CS5534 only) G2-G0 (Gain Bits) [29:27] [13:11] For VRS = For VRS = Bipolar input span is twice the unipolar input span. 000 Gain = 1, (Input Span = [(VREF+)-(VREF-)]/1*A for unipolar). 001 Gain = 2, (Input Span = [(VREF+)-(VREF-)]/2*A for unipolar) ...
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U/B (Unipolar / Bipolar) [22] [6] 0 Select Bipolar mode. 1 Select Unipolar mode. OL1-OL0 (Output Latch Bits) [21:20] [5:4] The latch bits will be set to the logic state of these bits upon command word execution when the output ...
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Calibration Calibration is used to set the zero and gain slope of the ADC’s transfer function. The CS5532/34 offer both self calibration and system calibration. Note: After the ADCs are reset, they are functional and can perform measurements without ...
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Performing Calibrations To perform a calibration, the user must send a com- mand byte with its MSB=1, its pointer bits (CSRP2-CSRP0) set to address the desired Setup to calibrate, and the appropriate calibration bits (CC2- CC0) set to choose ...
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System Calibration For the system calibration functions, the user must supply the converter’s calibration signals which rep- resent ground and full scale. When a system offset calibration is performed, a ground-referenced signal must be applied to the converters. Figure ...
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ADC, and may prematurely halt the calibration cycle. For maximum accuracy, calibrations should be per- formed for both offset and gain (selected by chang- ing the G2-G0 bits of the channel-setup registers). Note that only one gain ...
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The single conversion mode will take longer than conversions performed in the continuous conversion mode. The number of clock cycles a single conversion ...
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Table 2. Conversion Timing – Continuous Mode FRS (WR3-WR0) Clock Cycles (First Conversion) 0 0000 89528 ± 0001 171448 ± 0010 335288 ± 0011 662968 ± 0100 1318328 ± 1000 ...
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SDO falls to indicate that the calibration is complete. To perform additional calibrations, more commands must be issued. Note: The CSRs need not be written. If they are not initialized, all the Setups ...
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... Table 4. Output Coding for 24-bit CS5532 and CS5534 Unipolar Input Voltage >(VFS-1.5 LSB) VFS-1.5 LSB VFS/2-0.5 LSB +0.5 LSB <(+0.5 LSB) 2.8.1. Conversion Data Output Descriptions D31(MSB) D30 D29 D28 D27 MSB D15 D14 D13 D12 D11 Conversion Data Bits [31:8] These bits depict the latest output conversion ...
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Digital Filter The CS5532/34 have linear phase digital filters which are programmed to achieve a range of output word rates (OWRs) as stated in the Channel-Setup Register Descriptions section. The ADCs use a 5 Sinc digital filter to output ...
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Clock Generator The CS5532/34 include an on-chip inverting am- plifier which can be connected with an external crystal to provide the master clock for the chip. Fig- ure 20 illustrates the on-chip oscillator. It includes loading capacitors and a ...
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V Analog Supply - Figure 21. CS5532 Configured with a Single +5 V Supply 40 10 Ω 0.1 µ VA+ VD+ OSC2 18 VREF+ 17 VREF- 3 ...
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V Analog Supply - -2.5 V Analog Supply Figure 22. CS5532 Configured with ±2.5 V Analog Supplies +3 V Analog Supply - -3 V Analog Supply Figure 23. CS5532 Configured with ±3 V Analog Supplies DS755F3 0.1 µF 5 ...
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V Analog Supply 2. Analog Supply Figure 24. CS5532 Configured for Thermocouple Measurement V+ ( Ω 0.1 µF 5 VA+ VD+ 1 AIN1+ OSC2 2 AIN1 CS5532 ...
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Getting Started This A/D converter has several features. From a software programmer’s prospective, what should be done first? To begin, a 4.9152 MHz or 4.096 MHz crystal takes approximately start. To accommodate for this ...
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... SDO SERIAL DATA OUT 9 12 SCLK OSC1 10 11 SERIAL CLOCK INPUT AIN2+ AIN1 DIFFERENTIAL ANALOG INPUT AIN1- AIN2 DIFFERENTIAL ANALOG INPUT CS5534 AIN3+ AIN4+ DIFFERENTIAL ANALOG INPUT 3 22 AIN4- AIN3- DIFFERENTIAL ANALOG INPUT VREF+ VOLTAGE REFERENCE INPUT VREF- VOLTAGE REFERENCE INPUT ...
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SDI - Serial Data Input. SDI is the input pin of the serial input port. Data will be input at a rate determined by SCLK. SDO - Serial Data Output. SDO is the serial data output. It will output a ...
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SPECIFICATION DEFINITIONS Linearity Error The deviation of a code from a straight line which connects the two endpoints of the ADC transfer function. One endpoint is located 1/2 LSB below the first code transition and the other endpoint is ...
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... CS5534- CS5534-BSZ ENVIRONMENTAL, MANUFACTURING, & HANDLING INFORMATION Model Number CS5532-BS CS5532-BSZ CS5534-BS CS5534-BSZ * MSL (Moisture Sensitivity Level) as specified by IPC/JEDEC J-STD-020. DS755F3 ±0.0015% -40°C to +85°C ±0.0015% -40°C to +85°C ±0.0015% -40°C to +85°C ±0.0015% -40°C to +85°C Peak Reflow Temp MSL Rating* 240 ° ...
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PACKAGE DRAWINGS 20 PIN SSOP PACKAGE DRAWING TOP VIEW DIM ∝ Notes: 1. “D” and “E1” are reference datums and do not included mold flash ...
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PIN SSOP PACKAGE DRAWING TOP VIEW DIM ∝ Notes: 1. “D” and “E1” are reference datums and do not included mold flash or protrusions, but ...
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Revisions REVISION DATE F1 Nov 2006 Initial Release. F2 MAY 2007 Corrected title to include 24-bit devices only. F3 OCT 2008 Changed Input Current to 1200 pA. Contacting Cirrus Logic Support For all product questions and inquiries contact a Cirrus ...