FDC6304P Fairchild Semiconductor, FDC6304P Datasheet - Page 2

• Manufacturer Part Number: FDC6304P
• Description: MOSFET P-CH DUAL 25V SSOT-6
• Manufacturer: Fairchild Semiconductor

Specifications of FDC6304P

• Fet Type: 2 P-Channel (Dual)
• Fet Feature: Logic Level Gate
• Rds On (max) @ Id, Vgs: 1.1 Ohm @ 500mA, 4.5V
• Drain To Source Voltage (vdss): 25V
• Current - Continuous Drain (id) @ 25° C: 460mA
• Vgs(th) (max) @ Id: 1.5V @ 250µA
• Gate Charge (qg) @ Vgs: 1.5nC @ 4.5V
• Input Capacitance (ciss) @ Vds: 62pF @ 10V
• Power - Max: 700mW
• Mounting Type: Surface Mount
• Package / Case: 6-SSOT, SuperSOT-6
• Configuration: Dual
• Transistor Polarity: P-Channel
• Resistance Drain-source Rds (on): 1.1 Ohm @ 4.5 V
• Forward Transconductance Gfs (max / Min): 0.8 S
• Drain-source Breakdown Voltage: 25 V
• Gate-source Breakdown Voltage: 8 V
• Continuous Drain Current: 0.46 A
• Power Dissipation: 900 mW
• Maximum Operating Temperature: + 150 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 55 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: FDC6304P; FDC6304PTR

Notes:
Electrical Characteristics
Symbol
OFF CHARACTERISTICS
BV
I
I
ON CHARACTERISTICS
V
R
I
g
DYNAMIC CHARACTERISTICS
C
C
C
SWITCHING CHARACTERISTICS
t
t
t
t
Q
Q
Q
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
I
V
1. R
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
DSS
GSS
D(ON)
D(on)
r
D(off)
f
S
FS
BV
V
GS(th)
SD
DS(ON)
iss
oss
rss
g
gs
gd
DSS
GS(th)
design while R
DSS
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
/ T
/ T
J
J
a. 140
2oz copper.
CA
Parameter
Drain-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Zero Gate Voltage Drain Current
Gate - Body Leakage Current
Gate Threshold Voltage Temp. Coefficient
Gate Threshold Voltage
Static Drain-Source On-Resistance
On-State Drain Current
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn - On Delay Time
Turn - On Rise Time
Turn - Off Delay Time
Turn - Off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Maximum Continuous Drain-Source Diode Forward Current
Drain-Source Diode Forward Voltage
is determined by the user's board design.
O
C/W on a 0.125 in
(Note 2)
2
pad of
(Note 2)
(T
A
= 25
O
C unless otherwise noted )
b. 180
of 2oz copper.
O
C/W on a 0.005 in
Conditions
V
I
V
V
I
V
V
V
V
V
V
V
V
V
V
V
V
D
D
f = 1.0 MHz
GS
DS
GS
DS
GS
GS
GS
GS
DS
DS
DD
GS
DS
GS
GS
= -250 µA, Referenced to 25
= -250 µA, Referenced to 25
= 0 V, I
= -20 V, V
= -8 V, V
= V
= -2.7 V, I
= -4.5 V, I
= -2.7 V, V
= -4.5 V, V
= -5 V, I
= -10 V, V
= -6 V, I
= -4.5 V, R
= -5 V, I
= -4.5 V
= 0 V, I
2
of pad
GS
, I
D
D
S
D
D
D
= -0.5 A
= -250 µA
DS
= -250 µA
= -0.5 A
= - 0.25 A,
D
D
GS
GS
= -0.5 A,
= 0 V
DS
DS
GEN
= -0.25 A
= -0.5 A
= 0 V
= 0 V,
= -5 V
= -5 V
= 50
(Note 2)
T
T
J
J
= 55°C
o
o
=125°C
C
C
-0.65
Min
-0.5
-25
-1
-0.86
-0.88
Typ
1.22
0.87
1.21
0.32
0.28
-22
2.1
0.8
9.5
1.1
62
35
55
35
7
8
Max
-100
-1.5
110
-0.5
-1.2
JC
-10
1.5
1.1
1.5
20
20
70
-1
2
is guaranteed by
FDC6304P Rev.D
mV /
mV /
Units
µA
µA
nA
nC
nC
nC
ns
ns
ns
ns
V
V
A
S
pF
pF
pF
A
V
o
o
C
C