STS8DNF3LL STMicroelectronics, STS8DNF3LL Datasheet
STS8DNF3LL
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STS8DNF3LL Summary of contents
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... Switching application Order codes Part number STS8DNF3LL January 2007 Dual N-channel 30V - 0.017Ω SO-8 Low gate charge STripFET™ II Power MOSFET R I DS(on) D <0.020Ω 8A Internal schematic diagram Marking S8DNF3LL Rev 10 STS8DNF3LL S0-8 Package Packaging SO-8 Tape & reel 1/12 www.st.com 12 ...
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... Contents Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) 3 Test circuit 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2/ STS8DNF3LL . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 ...
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... STS8DNF3LL 1 Electrical ratings Table 1. Absolute maximum ratings Symbol V Drain-source voltage ( Gate- source voltage GS Drain current (continuos single operating Drain current (continuos single operating (1) I Drain current (pulsed) DM Total dissipation TOT Total dissipation Pulse width limited by safe operating area Table 2. Thermal data ...
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... Parameter Test conditions V = 15V 25V MHz 15V (see Figure 14) Parameter Test conditions V = =4.7Ω (see Figure 13 =4.7Ω (see Figure 13) STS8DNF3LL Min. Typ 250µ 0.017 0.020 D Min. Typ. Max 12.5 D 800 250 60 12.5 = 8A, D 3.2 4.5 Min. Typ. =4A 4.5V ...
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... STS8DNF3LL Table 6. Source drain diode Symbol I Source-drain current SD (1) I Source-drain current (pulsed) SDM (2) V Forward on voltage SD t Reverse recovery time rr Q Reverse recovery charge rr I Reverse recovery current RRM 1. Pulse width limited by safe operating area. 2. Pulsed: Pulse duration = 300 µs, duty cycle 1.5% ...
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... Electrical characteristics 2.1 Electrical characteristics (curves) Figure 1. Safe operating area Figure 3. Output characteristics Figure 5. Transconductance 6/12 Figure 2. Thermal impedance Figure 4. Transfer characteristics Figure 6. Static drain-source on resistance STS8DNF3LL ...
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... STS8DNF3LL Figure 7. Gate charge vs. gate-source voltage Figure 8. Figure 9. Normalized gate threshold voltage vs. temperature Figure 11. Source-drain diode forward characteristics Electrical characteristics Capacitance variations Figure 10. Normalized on resistance vs. temperature Figure 12. Normalized breakdown voltage vs. temperature 7/12 ...
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... Test circuit Figure 13. Switching times test circuit for resistive load Figure 15. Test circuit for inductive load switching and diode recovery times Figure 17. Unclamped inductive waveform 8/12 Figure 14. Gate charge test circuit Figure 16. Unclamped Inductive load test circuit Figure 18. Switching time waveform STS8DNF3LL ...
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... STS8DNF3LL 4 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label ...
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... STS8DNF3LL inch MIN. TYP. MAX. 0.068 0.003 0.009 0.064 0.025 0.033 0.013 0.018 0.007 0.010 0.010 0.019 0.188 0.196 0.228 0.244 ...
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... STS8DNF3LL 5 Revision history Table 7. Revision history Date 11-Sep-2006 15-Nov-2006 30-Jan-2007 Revision 8 Complete document 9 The document has been reformatted 10 Typo mistake on Table Revision history Changes 1. 11/12 ...
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... Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America 12/12 Please Read Carefully: © 2007 STMicroelectronics - All rights reserved STMicroelectronics group of companies www.st.com STS8DNF3LL ...