STA304 STMicroelectronics, STA304 Datasheet - Page 9

• Manufacturer Part Number: STA304
• Description: Audio DSPs Digital Audio Proc
• Manufacturer: STMicroelectronics

Specifications of STA304

• Mounting Style: SMD/SMT
• Package / Case: TQFP-44
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

STA304
4.0 I2S OUTPUT INTERFACE CONFIGURATION
In order to configure the I2S output interface the Configuration Register B (CRB) can be used. Using the 3
I2SO_Align_x bits one of 6 configuration mode can be selected. Following is a table describing each one of
them.
By default standard I2S output interface master is provided (mode 1 in bits 8,9,10 of register CRB,
I2SO_BICK_Pol = 1 and I2SO_LRCK_Pol = 0 in the same register)
4.1 Switching characteristics (10 pf load; Fsm=48 KHz):
Figure 3.
9/31
SCKO frequency (master mode):
SCKO pulse width low (T
SCKO pulse width high (T
SCKO active to LRCKO edge delay (T
SCKO active to LRCKO edge setup (T
SDO valid to SCKO active setup (T
SCKO active to SDO hold time (T
SCKO falling to LRCKO edge (T
SCKO falling to SDO edge(T
MODE
0
1
2
3
4
5
6
7
# of SLOTS
Not valid
(slave mode):
32
32
32
32
24
24
24
0
1
) (slave mode):
) (slave mode):
(slave mode):
7
LRCKO
) (master mode):
BICKO
SDO
W. LENGHT
6
) (master mode):
Not valid
5
):
4
):
24
24
16
24
24
16
24
2
3
):
):
T
2
T
7
T
6
ALIGNMENT
T
4
T
Not valid
3
Right
Right
Right
Right
Left
Left
Left
64 Fsm
64 Fsm
min 40 ns.
min 40 ns.
min 20 ns.
min 20 ns.
min 20 ns.
min 20 ns.
min 2 ns; max 8 ns.
min 2 ns; max 8 ns.
min 6 ns; max 17 ns
T
5
T
0
DELAY SLOT
Not valid
Yes
No
No
No
No
No
No
T
D00AU1245
1
MSb first only
Slave only
Reserved, do not use.
MSb first only. Slave only
Slave only
NOTES