DS34T101GN Maxim Integrated Products, DS34T101GN Datasheet - Page 12

• Manufacturer Part Number: DS34T101GN
• Description: Communication ICs - Various Single TDM-Over-Pack et Chip AAL1, CESoPS
• Manufacturer: Maxim Integrated Products

TDMoP CAS Support
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Test and Diagnostics
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CPU Interface
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____________________________________________________ DS34T101, DS34T102, DS34T104, DS34T108
On-chip CAS handler terminates E1/T1 CAS when using AAL1/CESoPSN in structured-with-CAS mode.
CPU intervention is not required for CAS handling.
IEEE 1149.1 JTAG support
Per-channel programmable on-chip bit error-rate testing (BERT)
Pseudorandom patterns including QRSS
User-defined repetitive patterns
Error insertion single and continuous
Total-bit and errored-bit counts
Payload error insertion
Error insertion in the payload portion of the T1 and E1 frame in the transmit path
Errors can be inserted over the entire frame or selected channels
Insertion options include continuous and absolute number with selectable insertion rates
F-bit corruption for line testing
Loopbacks (remote, local, analog, and per-channel loopback)
MBIST (memory built-in self test)
32 or 16-bit parallel interface or optional SPI serial interface
Byte write enable pins for single-byte write resolution
Hardware reset pin
Software reset supported
Software access to device ID and silicon revision
On-chip SDRAM controller provides access to SDRAM for both the chip and the CPU
CPU can access transmit and receive buffers in SDRAM used for packets to/from the CPU (ARP, SNMP, etc.)
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