LAN9215I-MT SMSC, LAN9215I-MT Datasheet - Page 33

Ethernet ICs Indust Hi Efficient Single-Chip

LAN9215I-MT

Manufacturer Part Number
LAN9215I-MT
Description
Ethernet ICs Indust Hi Efficient Single-Chip
Manufacturer
SMSC
Type
Single Chip MAC and PHY Controllerr
Datasheet

Specifications of LAN9215I-MT

Ethernet Connection Type
10 Base-T, 100 Base-TX
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Product
Ethernet Controllers
Number Of Transceivers
1
Standard Supported
802.3, 802.3u
Data Rate
10 Mbps, 100 Mbps
Supply Voltage (max)
5 V
Supply Voltage (min)
3.3 V
Supply Current (max)
69 mA
Maximum Operating Temperature
+ 85 C
Package / Case
TQFP-100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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16-bit Non-PCI 10/100 Ethernet Controller with HP Auto-MDIX and Industrial Temperature Support
Datasheet
SMSC LAN9215i
3.8.2.1
The host can disable the EEPROM interface through the GPIO_CFG register. When the interface is
disabled, the EEDIO and ECLK signals can be used as general-purpose outputs, or they may be used
to monitor internal MII signals.
Supported EEPROM Operations
The EEPROM controller supports the following EEPROM operations under host control via the
E2P_CMD register. The operations are commonly supported by “93C46” EEPROM devices. A
description and functional timing diagram is provided below for each operation. Please refer to the
E2P_CMD register description in
page 95
for E2P_CMD field settings for each command.
Busy Bit = 0
EEPROM Write
Figure 3.2 EEPROM Access Flow Diagram
Write Data
Command
Command
Register
Register
Register
Write
Read
Idle
Section 5.3.23, "E2P_CMD – EEPROM Command Register," on
DATASHEET
33
EEPROM Read
Read Data
Command
Command
Register
Register
Register
Write
Read
Idle
Busy Bit = 0
Revision 2.7 (03-15-10)

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