DS2152LN Maxim Integrated Products, DS2152LN Datasheet - Page 51

• Manufacturer Part Number: DS2152LN
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated Products

Specifications of DS2152LN

• Product: Framer
• Number Of Transceivers: 1
• Data Rate: 2.048 Mbps
• Supply Voltage (max): 5.25 V
• Supply Voltage (min): 4.75 V
• Supply Current (max): 75 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP-100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TIDR: TRANSMIT IDLE DEFINITION REGISTER (Address = 3F Hex)
9.1.2 Per-Channel Code Insertion
The second method involves using the Transmit Channel Control Registers (TCC1/2/3) to determine
which of the 24 T1 channels should be overwritten with the code placed in the Transmit Channel
Registers (TC1 to TC24). This method is more flexible than the first in that it allows a different 8-bit code
to be placed into each of the 24 T1 channels.
TC1 TO TC24: TRANSMIT CHANNEL REGISTERS
(Address = 40 to 4F and 50 to 57 Hex)
(For brevity, only channel 1 is shown; see
TCC1/TCC2/TCC3: TRANSMIT CHANNEL CONTROL REGISTER
(Address = 16 to 18 Hex)
(MSB)
(MSB)
(MSB)
CH16
CH24
TIDR7
CH8
C7
SYMBOL
SYMBOL
SYMBOL
TIDR7
TIDR0
CH24
C7
C0
CH1
CH15
CH23
CH7
TIDR6
C6
POSITION
POSITION
POSITION NAME AND DESCRIPTION
TIDR.7
TIDR.0
TCC3.7
TCC1.0
TC1.7
TC1.0
CH14
CH22
CH6
C5
TIDR5
NAME AND DESCRIPTION
MSB of the Idle Code (this bit is transmitted first).
LSB of the Idle Code (this bit is transmitted last).
NAME AND DESCRIPTION
MSB of the Code (this bit is transmitted first).
LSB of the Code (this bit is transmitted last).
Transmit Channel 24 Code Insertion Control Bit
0 = do not insert data from the TC1 register into the transmit data
stream
1 = insert data from the TC1 register into the transmit data stream
Transmit Channel 1 Code Insertion Control Bit
0 = do not insert data from the TC32 register into the transmit data
stream
1 = insert data from the TC32 register into the transmit data stream
CH13
CH21
CH5
Table 2-1
C4
TIDR4
for other register address.)
51 of 97
CH12
CH20
CH4
C3
TIDR3
CH11
CH19
CH3
C2
TIDR2
CH10
CH18
CH2
C1
TIDR1
CH17
(LSB)
CH1
CH9
(LSB)
C0
TCC1 (16)
TCC2 (17)
TCC3 (18)
TC1 (50)
TIDR0
(LSB)