FDC653N Fairchild Semiconductor, FDC653N Datasheet - Page 2

• Manufacturer Part Number: FDC653N
• Description: MOSFET N-CH 30V 5A SSOT-6
• Manufacturer: Fairchild Semiconductor

Specifications of FDC653N

• Fet Type: MOSFET N-Channel, Metal Oxide
• Fet Feature: Logic Level Gate
• Rds On (max) @ Id, Vgs: 35 mOhm @ 5A, 10V
• Drain To Source Voltage (vdss): 30V
• Current - Continuous Drain (id) @ 25° C: 5A
• Vgs(th) (max) @ Id: 2V @ 250µA
• Gate Charge (qg) @ Vgs: 17nC @ 10V
• Input Capacitance (ciss) @ Vds: 350pF @ 15V
• Power - Max: 800mW
• Mounting Type: Surface Mount
• Package / Case: 6-SSOT, SuperSOT-6
• Configuration: Single Quad Drain
• Transistor Polarity: N-Channel
• Resistance Drain-source Rds (on): 0.035 Ohm @ 10 V
• Forward Transconductance Gfs (max / Min): 6.2 S
• Drain-source Breakdown Voltage: 30 V
• Gate-source Breakdown Voltage: +/- 20 V
• Continuous Drain Current: 5 A
• Power Dissipation: 1600 mW
• Maximum Operating Temperature: + 150 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 55 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: FDC653NTR

ELECTRICAL CHARACTERISTICS
Symbol
OFF CHARACTERISTICS
BV
I
I
I
ON CHARACTERISTICS
V
R
I
g
DYNAMIC CHARACTERISTICS
C
C
C
SWITCHING CHARACTERISTICS
t
t
t
t
Q
Q
Q
DRAIN-SOURCE DIODE CHARACTERISTICS
I
V
Notes:
1. R
DSS
GSSF
GSSR
D(on)
D(on)
r
D(off)
f
S
FS
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
BV
GS(th)
V
SD
DS(ON)
iss
oss
rss
g
gs
gd
DSS
GS(th)
design while R
a. 78
b. 156
JA
DSS
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
o
/ T
C/W when mounted on a minimum on a 1 in
/ T
o
C/W when mounted on a minimum pad of 2oz Cu in FR-4 board.
J
J
CA
Parameter
Drain-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Zero Gate Voltage Drain Current
Gate - Body Leakage, Forward
Gate - Body Leakage, Reverse
Gate Threshold Voltage
Gate Threshold VoltageTemp.Coefficient
Static Drain-Source On-Resistance
On-State Drain Current
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn - On Delay Time
Turn - On Rise Time
Turn - Off Delay Time
Turn - Off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Continuous Source Diode Current
Drain-Source Diode Forward Voltage
is determined by the user's board design.
(Note 2)
(Note 2)
2
pad of 2oz Cu in FR-4 board.
(T
A
= 25°C unless otherwise noted)
Conditions
V
I
V
V
V
V
I
V
V
V
V
V
f = 1.0 MHz
V
V
V
V
V
D
D
GS
DS
GS
GS
DS
GS
GS
GS
DS
DS
DD
GS
DS
GS
GS
= 250 µA, Referenced to 25
= 250 µA, Referenced to 25
= 0 V, I
= 24 V, V
= 20 V, V
= -20 V, V
= V
= 10 V, I
= 4.5 V, I
= 10 V, V
= 10 V, I
= 15 V, V
= 10 V, I
= 4.5 V, R
= 15 V, I
= 10 V
= 0 V, I
GS
, I
D
D
S
= 250 µA
D
D
= 1.3 A
D
D
DS
= 250 µA
DS
D
GS
= 5 A
GS
DS
= 5 A
= 5 A,
GEN
= 4.2 A
= 1 A,
= 0 V
= 5 V
= 0 V
= 0 V
= 0 V,
= 6
(Note 2)
T
T
T
J
J
J
= 55
= 125
= 125
o
o
C
C
o
C
o
o
C
C
Min
30
1
8
0.027
0.042
0.046
0.75
Typ
-4.2
350
220
1.7
6.2
7.5
2.1
2.6
0.6
31
80
12
13
12
6
0.035
0.056
0.055
Max
-100
100
1.3
1.2
10
15
25
25
15
17
1
2
1
JC
is guaranteed by
FDC653N Rev.C
mV /
mV /
Units
µA
µA
nA
nA
nC
nC
nC
ns
ns
ns
ns
V
V
A
S
pF
pF
pF
A
V
o
o
C
C