821054PQF Integrated Device Technology (Idt), 821054PQF Datasheet

Page 1

QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE FEATURES • 4-channel CODEC with on-chip digital filters • Software selectable A/ -law, linear code conversion µ • Meets ITU-T G.711 - G.714 requirements • Programmable digital filters adapting to system demands: - ...

Page 2

IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE DESCRIPTION The IDT821054 is a feature rich, single-chip, programmable 4- channel PCM CODEC with on-chip filters. Besides the companding and linear coding/decoding (14 effective bits + 2 extra sign bits), the IDT821054 ...

Page 3

IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE 1 Pin Description...................................................................................................................................................................................................7 2 Functional Description ......................................................................................................................................................................................9 2.1 MPI/PCM Interface ....................................................................................................................................................................................9 2.1.1 Microprocessor Interface (MPI) ....................................................................................................................................................9 2.1.2 PCM Bus ....................................................................................................................................................................................10 2.2 DSP Programming...................................................................................................................................................................................11 2.2.1 Signal Processing.......................................................................................................................................................................11 2.2.2 Gain Adjustment.........................................................................................................................................................................11 2.2.3 Impedance Matching ...

Page 4

IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE 7.4 Group Delay ............................................................................................................................................................................................38 7.5 Distortion .................................................................................................................................................................................................38 7.6 Noise .......................................................................................................................................................................................................39 7.7 Interchannel Crosstalk.............................................................................................................................................................................39 7.8 Intrachannel Crosstalk.............................................................................................................................................................................39 8 Timing Characteristics ....................................................................................................................................................................................40 8.1 Clock Timing............................................................................................................................................................................................40 8.2 Microprocessor Interface Timing .............................................................................................................................................................41 8.3 PCM Interface Timing..............................................................................................................................................................................42 ...

Page 5

IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE Figure - 1 An Example of the MPI Interface Write Operation .............................................................................................................................. 9 Figure - 2 An Example of the MPI Interface Read Operation (ID = 81H)............................................................................................................. 9 Figure - 3 Sampling ...

Page 6

IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE Table - 1 BT/Bellcore Standard of FSK Signal ..................................................................................................................................................14 Table - 2 Consecutive Adjacent Addressing......................................................................................................................................................17 Table - 3 Global Registers (GREG) Mapping ....................................................................................................................................................22 Table - 4 Local Registers (LREG) Mapping.......................................................................................................................................................23 Table - ...

Page 7

IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE 1 PIN DESCRIPTION Name Type Pin Number GNDA1 50 GNDA2 54 Ground GNDA3 59 GNDA4 63 GNDD Ground 21 VDDA12 52 Power VDDA34 61 VDDD Power 24 VDDB Power 57 − CNF ...

Page 8

IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE Name Type Pin Number CCLK I 18 MCLK RESET INT12 O 34 INT34 O 15 CHCLK1 O 33 CHCLK2 ...

Page 9

IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE 2 FUNCTIONAL DESCRIPTION The IDT821054 is a four-channel PCM CODEC with on-chip digital filters. It provides a four-wire solution for the subscriber line circuitry in digital switches. The IDT821054 converts analog voice ...

Page 10

IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE 2.1.2 PCM BUS The IDT821054 provides two flexible PCM buses for all 4 channels. The digital PCM data can be compressed (A/ shown in Figure - 3, the data rate can be ...

Page 11

IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE 2.2 DSP PROGRAMMING 2.2.1 SIGNAL PROCESSING Several blocks are programmable for signal processing. This allows users to optimize the performance of the IDT821054 for the system. Figure - 4 shows the signal ...

Page 12

IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE 2.2.4 TRANSHYBRID BALANCE The ECF filter is used to adjust transhybrid balance and ensure that the echo cancellation meets the ITU-T specifications. If the CS[1] bit in LREG1 is ‘0’, the ECF ...

Page 13

IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE channels’ SI1 and SI2 status changes can be cleared by applying a read operation to GREG9. If SB1, SB2 and SB3 pins are configured as inputs, a read operation to GREG10, GREG11 ...

Page 14

IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE 40 Hz < f < 60 Hz, tolerance < ± < f < 100 Hz, tolerance < ±2.5% 100 Hz < f < 3400 Hz, tolerance < ±1% The frequency ...

Page 15

IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE Start Read FO and FS bit in GREG17 Set "Seizure Length" in GREG15 Set "Mark Length" in GREG16 Set "Flag Length" ...

Page 16

IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE the linear PCM data will be sent to the level meter and the metering result will be output to GREG18 and GREG19. With this result, the signal level can be calculated. For ...

Page 17

IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE 3 OPERATING THE IDT821054 3.1 PROGRAMMING DESCRIPTION The IDT821054 is programmed by writing commands to registers and coefficient RAM. A Channel Program Enable register (GREG6) is provided for addressing individual or multiple ...

Page 18

IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE Block 5: FRR RAM (Word 32 - Word 38) and GRX RAM (Word 39), containing the coefficient of the Frequency Response Correction in Receive Path and the Gain in Receive Path. For ...

Page 19

IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE data byte 9 high byte of word 4 of block 3 (see Note 1) data byte 10 low byte of word 4 of block 3 data byte 11 high byte of word ...

Page 20

IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE data byte 1 data read out from high byte of word 8 of block 3 data byte 2 data read out from low byte of word 8 of block 3 data byte ...

Page 21

IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE 3.2 POWER-ON SEQUENCE To power on the IDT821054, users should follow the sequence below: 1. Apply ground first; 2. Apply VCC, finish signal connections and set the RESET pin to logic low. ...

Page 22

IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE 3.4 REGISTERS DESCRIPTION 3.4.1 REGISTERS OVERVIEW Table - 3 Global Registers (GREG) Mapping Name Function b7 Version number (read)/ GREG1 no operation (write) Interrupt clear GREG2 Software reset GREG3 Hardware reset GREG4 ...

Page 23

IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE Table - 4 Local Registers (LREG) Mapping Name Function b7 Coefficient selection CS[7] LREG1 Local loopbacks control and SLIC input IE[4] LREG2 interrupt enable DSH and GK debounce filters GK[3] LREG3 configuration ...

Page 24

IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE For the global and local registers described below, it should be noted that Read command. R Write command. 2. The reserved bit(s) in the registers must ...

Page 25

IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE CHclk1[3:0] = 1000: chclk1 outputs a digital signal with the frequency of 1000/16 Hz; CHclk1[3:0] = 1001: chclk1 outputs a digital signal with the frequency of 1000/18 Hz; CHclk1[3:0] = 1010: chclk1 ...

Page 26

IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE CS[1:0] = 10: transmits data on falling edges of BCLK, receives data on falling edges of BCLK. CS[1:0] = 11: transmits data on falling edges of BCLK, receives data on rising edges ...

Page 27

IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE GREG10: SB1 Direction Control and SB1 Status/Control Data, Read/Write (29H/A9H) b7 Command R/W I/O data SB1C[3] The SB1 direction control bits SB1C[3:0] in this register determine the directions of the SB1 pins ...

Page 28

IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE pins respectively. When the SB3 pins of Channel 1 to Channel 4 are configured as outputs, the control data is written to these four SB3 pins via the SB3[0] to SB3[3] bits ...

Page 29

IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE The FSK function block is enabled. The BT/Bellcore Select bit (BS) determines which specification the IDT821054 will follow Bellcore specification is selected (default ...

Page 30

IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE The Linear/Compressed bit (L/C) determines the mode of level meter operation. L Message mode is selected. The compressed PCM data will be output to GREG19 transparently (default). L ...

Page 31

IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE 3.4.3 LOCAL REGISTERS LIST LREG1: Coefficient Selection, Read/Write (00H/80H) b7 Command R/W I/O data CS[7] The Coefficient Select bits (CS[7:0]) are used to control digital filters and function blocks on each channel. ...

Page 32

IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE IE[ Interrupt enabled. The interrupt generated by changes of SI1 will be recognized. The Loopback Control Bits (DLB_PCM, ALB_1BIT and DLB_1BIT) determine the loopback status on the corresponding channel. Refer ...

Page 33

IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE LREG4: Channel I/O Data, Read/Write (03H/83H) b7 Command R/W I/O data Reserved The Channel I/O Data bits contain the information of the SLIC I/O pins (SI1, SI2, SB1, SB2, SB3, SO1 and ...

Page 34

IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE transmit PCM data. For compressed code (A/µ-Law), this register is not used (when being read, it will output a data byte of 00H). The high byte of transmit PCM data will be ...

Page 35

IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE 4 ABSOLUTE MAXIMUM RATINGS Ratings Power supply voltage Voltage on Any Pin with respect to ground Package power dissipation Storage temperature Note: Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may ...

Page 36

IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE 6.3 ANALOG INTERFACE Parameter Description V Output voltage, VOUT OUT1 V Output voltage swing, VOUT OUT2 R Input resistance, VIN I R Output resistance, VOUT O R Load resistance, VOUT L C ...

Page 37

IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE 7 TRANSMISSION CHARACTERISTICS 0 dBm0 is defined as 0.775 Vrms for A-law and 0.769 Vrms for 1020 Hz sine wave; the input amplifier is set for unity gain. The digital input is ...

Page 38

IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE 7.4 GROUP DELAY Parameter Description Transmit delay, relative to 1800 500 to 600 600 to 1000 1000 to 2600 Hz f ...

Page 39

IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE 7.6 NOISE Parameter Description N Transmit noise, C-message weighted for µ-law XC N Transmit noise, psophometrically weighted for A-law XP N Receive noise, C-message weighted for µ-law RC N Receive noise, psophometrically ...

Page 40

IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE 8 TIMING CHARACTERISTICS 8.1 CLOCK TIMING Symbol Description t1 CCLK period t2 CCLK pulse width t3 CCLK rise and fall time t4 BCLK period t5 BCLK pulse width t6 BCLK rise and ...

Page 41

IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE 8.2 MICROPROCESSOR INTERFACE TIMING Symbol Description t11 CS setup time t12 CS pulse width t13 CS off time t14 Input data setup time t15 Input data hold time t16 SLIC output latch ...

Page 42

IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE 8.3 PCM INTERFACE TIMING Symbol Description t21 Data enable delay time t22 Data delay time from BCLK t23 Data float delay time t24 Frame sync setup time t25 Frame sync hold time ...

Page 43

IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE 9 APPENDIX: IDT821054 COE-RAM MAPPING Block # Word # Generally, 6 bits of address are needed to ...

Page 44

IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE 10 ORDERING INFORMATION XXXXXX IDT Dev ice Ty pe XXX X Process/ Package Temperature Range Blank PQF 821054 44 INDUSTRIAL TEMPERATURE RANGE Industrial (-40 °C to +85 °C) Plastic Quad Flat Pack ...

Page 45

IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE DATA SHEET DOCUMENT HISTORY 12/21/2001 pgs. 8, 22, 26, 27 01/03/2002 pg. 24 01/23/2002 pgs 11, 15, 21 02/19/2002 pg. 27 10/30/2002 pgs. 14, 21, 22, 25, 27 ...