TDA18271HD/C2-T NXP Semiconductors, TDA18271HD/C2-T Datasheet
TDA18271HD/C2-T
Specifications of TDA18271HD/C2-T
Related parts for TDA18271HD/C2-T
TDA18271HD/C2-T Summary of contents
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TDA18271HD Silicon Tuner IC Rev. 04 — 19 May 2009 1. General description The TDA18271HD is a Silicon Tuner IC designed mainly for terrestrial analog and digital TV reception. The TDA18271HD integrates the overall tuning function, including selectivity. The TDA18271HD ...
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... S dig S a [1] Measured with TDA10048HN channel decoder. [2] Measured with TDA8295 IF modulator. 5. Ordering information Table 2. Type number TDA18271HD/C2 TDA18271HD_4 Product data sheet Quick reference data Conditions RF frequency on pin slave tuner output STO tuner noise figure maximum gain phase noise 1 kHz and 10 kHz ...
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... NXP Semiconductors 6. Block diagram AGC CONTROL LNA 10 RF_IN ATTENUATORS AGC1 AGC2 15 STO FM_IN TDA18271HD INTERFACE 32 AS Fig 1. Block diagram TDA18271HD_4 Product data sheet DC-to-DC CONVERTER LC RF tracking polyphase filters filter RF AGC TEST SIGNAL GENERATOR CONTROL CALIBRATION SYNTHESIZER VT_CAL CP_CAL SCL SDA Rev. 04 — ...
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... NXP Semiconductors 7. Pinning information 7.1 Pinning terminal 1 index area CAPRFAGC Fig 2. 7.2 Pin description Table 3. Symbol GND FM_IN VCC RF_IN GND CAPRFAGC LT TDA18271HD_4 Product data sheet GND 1 GND 2 GND 3 GND 4 GND 5 GND 6 GND 7 FM_IN 8 TDA18271HD VCC 9 RF_IN 10 GND GND 14 STO 15 VCC ...
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... NXP Semiconductors Table 3. Symbol GND STO VCC CAPREGVCO VCC MASTERSYNC CAPFILTVCO VT_COARSE VT_FINE GND CP_LO GND XTALP XTALN FREEZE XTOUT_MS XTOUTP XTOUTN AS VCC CP_CAL VT_CAL GND SCL SDA CAPREG18 GND CAPREG28 GND VCC IFOUTN IFOUTP V_IFAGC GND VSYNC CAPREGFILTRF GND GND ...
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... XTOUT_ON = 1, a clock signal is available on pins XTOUTP and XTOUTN to drive a second tuner, a channel decoder demodulator (TDA8295) for analog TV reception and FM radio. Remark: Most recent video decoders from NXP Semiconductors include a low IF demodulation function. 8.1 TV and FM reception The Silicon Tuner can be used in two modes, selectable via the I • ...
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... NXP Semiconductors 8.3 Tuner outputs The tuner provides a slave tuner output (pin STO) and a loop-through output (pin LT). These outputs are used to transmit the antenna signal to other tuners. Each output has its own characteristics (see 8.3.1 Loop-through output The gain between the antenna connector and the loop-through pin (pin LT) equals 0 dB. ...
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... NXP Semiconductors 9. Control interface 2 9.1 I C-bus format, Write/Read mode Remark: The I required subaddress 00h. The number of bytes read is 16 extended register mode; see programmed values. TDA18271HD_4 Product data sheet 2 C-bus read in the TDA18271HD must read the entire I Table 7. Reading write-only bits can return values that are different from the Rev. 04 — ...
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Table 5. I C-bus format Name Byte Sub name address 7 Address byte Address byte byte ID 00h 1 Thermo byte TM 01h POR Power level byte PL 02h Easy ...
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Table 5. I C-bus format …continued Name Byte Sub name address 7 Extended byte 7 EB7 16h Extended byte 8 EB8 17h CID_ALARM Extended byte 9 EB9 18h Extended byte 10 EB10 19h Extended byte 11 EB11 1Ah Extended ...
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... NXP Semiconductors 2 9.2 I C-bus at Power-On Reset 2 Table 6. I C-bus at Power-On Reset Name Byte Address byte 1 - Address byte byte ID Thermo byte TM Power level byte PL Easy prog byte 1 EP1 Easy prog byte 2 EP2 Easy prog byte 3 EP3 Easy prog byte 4 EP4 Easy prog byte 5 ...
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... NXP Semiconductors 2 Table 6. I C-bus at Power-On Reset Name Byte Extended byte 21 EB21 Extended byte 22 EB22 Extended byte 23 EB23 [1] X indicates a bit not changed on reset. 9.3 Description of symbols used Table 7. I C-bus register bits explanation Address Byte Symbol MA[1:0] AD[5:0] Data bytes ...
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... NXP Semiconductors 2 Table 7. I C-bus register bits explanation Address Byte Symbol 08h CPD CAL_POST_DIV[7:0] 09h CD1 CAL_DIV[22:16] 0Ah CD2 CAL_DIV[15:8] 0Bh CD3 CAL_DIV[7:0] 0Ch MPD IF_NOTCH MAIN_POST_DIV[6:0] LO synthesizer post-divider bits 0Dh MD1 MAIN_DIV[22:16] 0Eh MD2 MAIN_DIV[15:8] 0Fh MD3 MAIN_DIV[7:0] Extended bytes ...
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... write mode read mode Description must be set to 00 programmable address bits of the first programming byte Description must be 1 TDA18271HD/C2 identification number 52) Silicon Tuner Table 52) Table 52) Table 52) © NXP B.V. 2009. All rights reserved ...
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... NXP Semiconductors 9.3.4 Description of power level byte (read mode) There are 9 power level bits sent in power level bytes 2 and 3. They indicate the composite voltage gain of the LNA, the loaded attenuator voltage gains, and the level at the input of the RF AGC. Table 12. ...
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... NXP Semiconductors Table 13. Legend: * power-on reset value. Bit BP_FILTER[2:0] 9.3.6 Description of Easy prog byte 2 Table 14. Legend: * power-on reset value. Bit RF_BAND[2: GAIN_TAPER[4:0] 9.3.7 Description of Easy prog byte 3 The TDA18271HD has three different Standby modes. Two Standby modes are dedicated to special application demands; the third Standby mode is called ‘device-off’. It represents the smallest achievable power consumption ...
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... NXP Semiconductors Table 17. Standard FM radio Analog TV standards Digital TV standards [1] Depending on the programmed AGC_MODE, AGC1 can be synchronous with either VSYNC or an internal 16 MHz signal; for analog reception, when no synchronization signal is available for VSYNC pin, the internal reference may be used. 9.3.8 Description of Easy prog byte 4 Table 18 ...
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... NXP Semiconductors The RF tracking filters central frequency can be adjusted with the tuning word RFC_CPROG. The RF tracking filter calibration (RFCAL) uses an internal tone at the input of the tracking filters (generated by CAL PLL) and finds the RFC_CPROG that corresponds to the maximum transmitted power. The RFCAL is just a small part of a more complex algorithm fully described in the fl ...
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... NXP Semiconductors 9.3.12 Description of Main post-divider byte Table 22. Legend: * power-on reset value. Bit 9.3.13 Description of Main divider bytes 1, 2 and 3 Table 23. Legend: * power-on reset value. Address Register Bit 0Dh 0Eh 0Fh 9.3.14 Description of Extended bytes Table 24. EB1 to EB23 - Extended bytes (address 10h to 26h) bit description Legend: * power-on reset value ...
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... NXP Semiconductors Table 24. EB1 to EB23 - Extended bytes (address 10h to 26h) bit description Legend: * power-on reset value. Address Register Bit 13h EB4 14h EB5 15h EB6 16h EB7 7 and 6 EB7[7: 17h EB8 18h EB9 19h EB10 7 and 6 EB10[7: 1Ah EB11 1Bh EB12 ...
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... NXP Semiconductors Table 24. EB1 to EB23 - Extended bytes (address 10h to 26h) bit description Legend: * power-on reset value. Address Register Bit 20h EB17 21h EB18 and 0 AGC1_GAIN[1:0] 22h EB19 23h EB20 7 and 6 EB20[7: 24h EB21 and 0 AGC2_GAIN[1:0] 25h EB22 26h EB23 TDA18271HD_4 Product data sheet ...
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... NXP Semiconductors Table 25. RF input RF_IN Table 26. RF input FM_IN 2 9.4 I C-bus programming flowcharts The following flowcharts describe how to: • Initialize the TDA18271HD • Launch the calibrations • Normal mode The image rejection calibration and RF tracking filter calibration must be launched exactly as described in the fl ...
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... NXP Semiconductors Fig C-bus write: – IR_GSTEP is updated, no immediate I – I2C_XTOUT_ASYM is updated followed – PD_AGC1_DET is updated followed – I byte EB13 2 I C-bus read: – Subaddressing is not supported in read mode – The mandatory I described in “Flowchart TDA18271ReadExtended” 2. Update at the same time is indicated by separation with commas: ...
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... NXP Semiconductors Fig 4. Fig 5. a. General description to find a value in a table b. Example to find the value RFC_K corresponding to f Fig 6. Units: In the flowcharts, hexadecimal values end with “h”, decimal values with “d”. TDA18271HD_4 Product data sheet Blocks used in the flowcharts ...
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... NXP Semiconductors 9.4.2 Flowchart TDA18271SetRf_dual The initialization phase has to be launched before any SetRf. Table 27. Function Description protocol top view for a dual tuner application Input Table Output [ master is selected for the channel configuration slave is selected for the channel configuration. ...
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... NXP Semiconductors Fig 8. 9.4.4 Flowchart TDA18271FixedContentsI2Cupdate Table 29. Function Description Input Table Output The register contents are not described in detail as this procedure is not to be modified. TDA18271HD_4 Product data sheet Start TDA18271InitCal MS_init = 1 Master initialization 2 I C-bus initialization sequence Call TDA18271FixedContentsI2Cupdate MS_init ...
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... NXP Semiconductors Start TDA18271FixedContentsI2Cupdate 2 Actions Internal table I C-bus Internal table update with TM = 08h - correct values PL = 80h - EP1 = C6h - EP2 = DFh - EP3 = 16h - EP4 = 60h - EP5 = 80h - CPD = 80h - CD1 = 00h - CD2 = 00h - CD3 = 00h - MPD = 00h - MD1 = 00h - MD2 = 00h - MD3 = 00h ...
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... NXP Semiconductors f RF(max) f RF(max) f RF(max RF(max) f RF(max) f RF(max) f RF(max) Variable RF_max is used for frequency f Fig 10. Flowchart TDA18271CalcRFFilterCurve TDA18271HD_4 Product data sheet Start TDA18271CalcRFFilterCurve Wait 200 ms for die temperature stabilization PowerScan Initialization Call TDA18271PowerScanInit f = 47900 kHz RF(max) RF_Band 0 filters calibration Call TDA18271RFTrackingFiltersInit ...
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... NXP Semiconductors 9.4.6 Flowchart TDA18271RFTrackingFiltersInit Table 31. Function Description Input Table Output bcal is a boolean output from TDA18271PowerScan: bcal = 1 (true): enables the calibration of the RF tracking filters bcal = 0 (false): no calibration is performed, default values for RFC_CPROG are used TDA18271HD_4 Product data sheet TDA18271RFTrackingFiltersInit Description calculate the RF fi ...
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... NXP Semiconductors Fig 11. Flowchart TDA18271RFTrackingFiltersInit TDA18271HD_4 Product data sheet TDA18271RFTrackingFiltersInit RF_A1 = 0, RF_B1 = 0, RF_A2 = 0, RF_B2 = 0 RF1_default Find RF1_default, RF2_default, RF3_default = f Look for optimized calibration frequency MS Call TDA18271PowerScan MS Find Cprog_cal1 to track RF1 RF1 Call TDA18271CalibrateRF RF1 Find Cprog_table = f in RF_CAL_map RF(max) RF_CAL_map Cprog_cal1 = Cprog_table1 ...
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... NXP Semiconductors 9.4.7 Flowchart TDA18271PowerScanInit Table 32. Function Description Input Table Output Frequency unit during the algorithm in kHz. Variable count homogeneous to kHz. Actions Set standard mode to digital mode Tuner registers update Set AGC1_GAIN Set AGC2_GAIN 1.5 MHz low-pass filter Tuner register update Fig 12 ...
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... NXP Semiconductors RF_BAND_map RF_CAL_map CID_Target_map MS freq_input freq_MAINPLL freq_input sgn count freq_input freq_MAINPLL count freq_MAINPLL Fig 13. Flowchart TDA18271PowerScan TDA18271HD_4 Product data sheet Start TDA18271PowerScan Actions Find RF_BAND = f in RF_BAND_map (MS) RF(max) Find Cprog_table = f in RF_CAL_map RF(max) Find GAIN_TAPER = f in GAIN_TAPER_map RF(max) Find CID_Target count_limit = f ...
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... NXP Semiconductors 9.4.9 Flowchart TDA18271CalibrateRF Table 34. Function Description Input Table Output TDA18271HD_4 Product data sheet TDA18271RFCalibrateRF Description finds the Cprog for which freq_input is the central frequency of the RF tracking filters freq_input, MS BP_FILTER_map, KM_map and GAIN_TAPER_map RFC_CPROG Rev. 04 — 19 May 2009 TDA18271HD Silicon Tuner IC Reference Table 44 “ ...
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... NXP Semiconductors Actions Normal mode Switch OFF AGC1 Set AGC1_GAIN Frequency dependent parameters update Find BP_FILTER = f BP_FILTER_map Find GAIN_TAPER = f KM_map Find RF_BAND = f GAIN_TAPER_map Find RFC_K, RFC_M = f freq_input Tuner registers update MS MAIN PLL charge pump source CAL PLL charge pump source Force DC-DC converter ...
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... NXP Semiconductors 9.4.10 Flowchart TDA18271MSPOR Table 35. Function Description Input Table Output Actions Power Up Detector 1 Turn AGC1 loop ON Set AGC1_GAIN Set AGC2_GAIN POR mode 1.5 MHz low-pass filter disabled Fig 15. Flowchart TDA18271MSPOR 9.4.11 Flowchart TDA18271RFTrackingFiltersCorrection Table 36. Function Description find the Cprog corresponding to the ...
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... NXP Semiconductors RF_CAL_map RF_BAND_map freq_input MS RF_A2 Capprox = RF2 RF_A2 RF_B2 RF_B2 + Cprog_table Cprog_table freq_input RF_CAL_DC_OVER_DT_map freq_input dCoverdT TMVALUE_CURRENT TMVALUE_RFCAL Capprox RFCAL_TCOMP Fig 16. Flowchart TDA18271RFtrackingFiltersCorrection TDA18271HD_4 Product data sheet Start TDA18271RFTrackingFiltersCorrection Action Power-up TDA18271 Read current die temperature Call TDA18271ThermometerRead Frequency dependent parameters update ...
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... NXP Semiconductors 9.4.12 Flowchart TDA18271ChannelConfiguration Table 37. Function Description tunes the tuner according to the Input Table Output TDA18271HD_4 Product data sheet TDA18271ChannelConfiguration Description channel and broadcast configuration freq_input, MS, Standard STANDARD_DESCRIPTION_map, BP_FILTER_map, RF_BAND_map, CAL_PLL_map, GAIN_TAPER_map, IR_MEAS_map - Rev. 04 — 19 May 2009 ...
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Start TDA18271ChannelConfiguration Actions Standard mode update Update TV broadcast parameters Standard Switch RFAGC to high speed mode Normal mode Update IF output level Update IF notch frequency Update extended byte 22 STANDARD_DESCRIPTION_ Update IF center frequency map Update FM_RFn IR_MEAS_map ...
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... NXP Semiconductors 9.4.13 Flowchart TDA18271CalcMAINPLL MPD, MD1, MD2 and MD3 are 8-bit registers. Arithmetical and logical operations performed on these registers are handled as binary operations. Dividing is right shifting and multiplying is left shifting. Table 38. Function Description Input Table Output MAIN_PLL_map Find MAIN_POST_DIV, Div = f ...
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... NXP Semiconductors Table 39. Function Description Input Table Output CAL_PLL_map Find CAL_POST_DIV, Div = f freq_input CAL_POST_DIV Update CPD byte Div CAL_DIV = (Div freq_input Update CD1, CD2, CD3 bytes CAL_DIV Tuner registers update Fig 19. Flowchart TDA18271CalcCALPLL 9.4.15 Flowchart TDA18271ThermometerRead Table 40. Function Description turns the on-chip temperature sensor ON, ...
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... NXP Semiconductors Actions Switch thermometer ON Read thermometer information Call TDA18271Read No Switch TM_RANGE Wait temperature sensing Read thermometer information Call TDA18271Read TM_D Find TMVALUE = f (TM_D, TM_RANGE) in TM_RANGE THERMOMETER_map Switch thermometer OFF Normal mode Fig 20. Flowchart TDA18271ThermometerRead 9.4.16 Flowchart TDA18271Read Table 41. Function Description ...
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... NXP Semiconductors (1) AddRead = C1h, C3h, C5h or C7h. ( Fig 21. Flowchart TDA18271Read 9.4.17 Flowchart TDA18271ReadExtended Table 42. Function Description Input Table Output The internal software registers are not updated throughout a read procedure. The update is performed at the level of the call TDA18271ReadExtended. (1) AddRead = C1h, C3h, C5h or C7h. ...
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... NXP Semiconductors 9.5 Maps Table 43. STANDARD_DESCRIPTION_map Standard Selection STD[2:0] Radio FM radio 000 Analog TV Analog TV std B 101 Analog TV std D/K 110 Analog TV std G/H Analog TV std I Analog TV std L Analog TV std L’ Analog TV std M/N 100 [3] Digital TV ATSC 6 MHz 100 DVB-T 6 MHz DVB-T 7 MHz ...
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... NXP Semiconductors Table 45. RF_BAND_map f RF_BAND Used in flowchart RF(max) (kHz) [2:0] RF_A1 47900 000 RF_A1_0 RF_B1_0 RF_A2_0 RF_B2_0 RF1_0 0 61100 001 RF_A1_1 RF_B1_1 RF_A2_1 RF_B2_1 RF1_1 0 152600 010 RF_A1_2 RF_B1_2 RF_A2_2 RF_B2_2 RF1_2 RF2_2 0 164700 011 RF_A1_3 RF_B1_3 RF_A2_3 RF_B2_3 RF1_3 0 203500 100 ...
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... NXP Semiconductors Table 47. f LO(max) 180500 198750 220750 248500 265000 284000 305500 331000 361000 397500 441500 497000 530000 568000 611000 662000 722000 795000 883000 994000 [1] Used in Table 48. f LO(max) 33813 36625 39938 43938 48813 54938 62813 67625 73250 79875 87875 97625 ...
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... NXP Semiconductors Table 48. f LO(max) 175750 195250 219750 251250 270500 293000 319500 351500 390500 439500 502500 541000 586000 639000 703000 781000 879000 [1] Used in Table 49. GAIN_TAPER[4:0] 1Fh 1Eh 1Dh 1Ch 1Bh 1Ah 19h 18h 17h 16h 15h 14h 13h 12h 11h 10h ...
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... NXP Semiconductors Table 49. GAIN_TAPER[4:0] 0Ch 0Bh 0Ah 09h 08h 07h 06h 05h 04h 03h 02h 01h 00h [1] The gain taper function compensates for any systematic RF gain ripple, giving a flat RF gain with frequency. Table 50. RF_CAL_DC_OVER_DT_map [1] f (kHz) dCoverdT f RF(max) RF(max) 47900 0h 383000 ...
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... NXP Semiconductors Table 50. RF_CAL_DC_OVER_DT_map [1] f (kHz) dCoverdT f RF(max) RF(max) 373000 1Fh 444000 376000 20h 447000 379000 21h 449000 [1] Used in flowcharts. Table 51. RF_CAL_map f Cprog_ f Cprog_ RF(max) RF(max) (kHz) table (kHz) table 41000 0Fh 127000 6Eh 43000 1Ch 128000 70h 45000 2Fh 129000 ...
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... NXP Semiconductors Table 51. RF_CAL_map …continued f Cprog_ f Cprog_ RF(max) RF(max) (kHz) table (kHz) table 81000 29h 160000 2Ch 82000 2Dh 161000 2Dh 83000 2Eh 163000 2Eh 84000 2Fh 164000 2Fh 85000 31h 164700 30h 86000 33h 166000 11h 87000 34h 167000 12h ...
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... NXP Semiconductors Table 52. Bit TM_ON must be set to logic 1. TM_D[3:0] 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 Table 53. f RF(max) 200 600 865 TDA18271HD_4 Product data sheet THERMOMETER_map TMVALUE (die temperature) TM_RANGE = IR_MEAS_map (kHz) Rev. 04 — ...
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... NXP Semiconductors Table 54. f RF(max) 46000 52200 70100 136800 156700 186250 230000 345000 426000 489500 697500 842000 TDA18271HD_4 Product data sheet CID_Target_map CID_Target Rev. 04 — 19 May 2009 TDA18271HD Silicon Tuner IC count_limit 1800 1500 4000 © NXP B.V. 2009. All rights reserved. ...
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... NXP Semiconductors 10. Internal circuitry Table 55. Internal circuits Symbol Pin Description FM_IN 8 RF_IN 10 CAPRFAGC STO 15 CAPREGVCO 17 TDA18271HD_4 Product data sheet [1] Average DC voltage 0 001aaf836 0 001aaf837 2 001aaf838 0. 001aaf839 0. 001aaf840 2.8 V (Normal mode (Standby mode) 17 001aaf841 Rev. 04 — 19 May 2009 TDA18271HD Silicon Tuner IC © NXP B.V. 2009. All rights reserved. ...
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... NXP Semiconductors Table 55. Internal circuits …continued Symbol Pin Description MASTERSYNC 19 CAPFILTVCO 20 VT_COARSE 21 VT_FINE 22 CP_LO 24 XTALP 26 XTALN 27 TDA18271HD_4 Product data sheet [1] Average DC voltage 0.5 19 001aaf842 1.6 V (Normal mode (Standby mode) 20 001aaf843 0.5 21 001aaf844 0.5 22 001aaf845 0.5 24 001aaf846 1. 001aaf847 1. 001aaf848 Rev. 04 — 19 May 2009 ...
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... NXP Semiconductors Table 55. Internal circuits …continued Symbol Pin Description FREEZE 28 XTOUT_MS 29 XTOUTP 30 XTOUTN CP_CAL 34 VT_CAL 35 TDA18271HD_4 Product data sheet [1] Average DC voltage 3 001aaf849 high-Z 29 001aaf850 2 001aaf851 2 001aaf852 high-Z 32 001aaf853 3.3 V (Normal mode); 0.5 34 001aaf854 3.3 V (Normal mode); 0.5 35 001aaf855 Rev. 04 — 19 May 2009 ...
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... NXP Semiconductors Table 55. Internal circuits …continued Symbol Pin Description SCL 38 SDA 39 CAPREG18 40 CAPREG28 42 IFOUTN 45 IFOUTP 46 TDA18271HD_4 Product data sheet [1] Average DC voltage high-Z 38 001aaf856 high-Z 39 001aaf857 1.8 V (Normal mode); 2.0 V (Sleep mode) 40 001aaf858 2.8 V (Normal mode); 2.4 V (Sleep mode) 42 001aaf859 1. 001aaf860 1.35 V ...
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... NXP Semiconductors Table 55. Internal circuits …continued Symbol Pin Description V_IFAGC 47 VSYNC 51 CAPREGFILTRF 52 [1] ESD protection components are not shown. 11. Limiting values Table 56. In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter stg esd [1] The TDA18271HD withstands the latch-up specifications of JEDEC JESD78A, with the specific recommendation using coupling capacitors on pins RF_IN, LT, STO, XTOUTP and XTOUTN ...
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... NXP Semiconductors 13. Characteristics All data in this section refers to Master mode operation Table 58 amb Symbol f RF(lt) VSWR G v(lt CSO CTB isol(bp) V L(tun-lto) [1] Channel loading assumptions: 129 channels (NTSC 129 frequency plan Table 59 amb Symbol f RF(STO) Z o(STO) G v(STO) TDA18271HD_4 Product data sheet Loop-through characteristics (RF input to loop-through output) = 3.3 V ...
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... NXP Semiconductors Table 60 amb for test circuit see Symbol Supply amb Input f RF VSWR NF tun G v(tun)max G AGC(tun) V i(max) V L(tun-RF) Output V o(IF)dif(p-p) Z o(IF) G AGC(IF) G tlt TDA18271HD_4 Product data sheet General characteristics for TV reception (RF input to IF output output level option 2 V (p-p); IF output load = each terminal; ...
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... NXP Semiconductors Table 60 amb for test circuit see Symbol f IF(stpb)lp image t d(grp) t ripple n Various t startup(tun) t set S dig S a [1] Measured with TDA10048HN channel decoder. [2] Measured with TDA8295 IF modulator. TDA18271HD_4 Product data sheet General characteristics for TV reception (RF input to IF output output level option 2 V (p-p); IF output load = each terminal; ...
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... NXP Semiconductors Table 61 3 unless otherwise specified. Symbol Parameter Supply I CC Input f RF VSWR Output o(p-p) isol(bp) Table 62 amb otherwise specified. Symbol IF AGC input: pin V_IFAGC V AGC /dV AGC Crystal oscillator f xtal Z i Crystal oscillator output buffer; pins XTOUTP and XTOUTN ...
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... NXP Semiconductors Table 62 amb otherwise specified. Symbol 2 [1] I C-bus Pin SCL SCL pin SDA [1] Devices that use non-standard supply voltages, which do not conform to the intended I levels, must relate their input levels to the supply voltage to which the pull-up resistors are connected. ...
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... NXP Semiconductors selectivity (dB) (1) 1.5 MHz bandwidth filter (2) 6 MHz bandwidth filter (3) 7 MHz bandwidth filter (4) 8 MHz bandwidth filter (5) 9 MHz bandwidth filter Fig 24. Typical IF selectivity curves TDA18271HD_4 Product data sheet ( Rev. 04 — 19 May 2009 TDA18271HD Silicon Tuner IC 001aah562 (2) (3) ...
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... NXP Semiconductors 14. Application information 14.1 Application examples RF PROTECTION RF TV PROTECTION Fig 25. Example of DVB-T dual tuner reception for PCTV applications TV CB FILTER TUNER TDA18271HD FM radio Fig 26. Example of hybrid reception for PCTV applications 14.2 Application notes Application notes are available for the following: • ...
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VCC3.3 4 VCC3.3 SDA SDA 3 GND 2 SCL 1 SCL R1 R2 2.2 2 VCC3.3 J101 R101 C101 GND FMIN_M GND 1 nF_5 % GND VCC1 GND GND C128 GND 47 nF GND FM_IN ...
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... NXP Semiconductors 16. Package outline HLQFN64R; plastic thermal enhanced low profile quad flat package; no leads; 64 terminals; resin based; body 9 terminal 1 index area terminal 1 index area DIMENSIONS (mm are the original dimensions) A UNIT max 0.3 9.1 2.92 mm 1.7 0.2 8.9 2.82 OUTLINE VERSION IEC ...
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... NXP Semiconductors 17. Printed-circuit board 17.1 Reflow profile See application note AN10366 . 17.2 De-soldering recommendation See application note AN10366 . TDA18271HD_4 Product data sheet Rev. 04 — 19 May 2009 TDA18271HD Silicon Tuner IC © NXP B.V. 2009. All rights reserved ...
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... NXP Semiconductors 17.3 Footprint layout C 0. solder lands solder paste solder resist occupied area DIMENSIONS 0.500 9.000 9.000 7.880 7.880 Fig 29. Footprint HLQFN64R (SOT903-1) TDA18271HD_4 Product data sheet 1 0.555 0.250 9.500 9.500 4.610 Rev. 04 — 19 May 2009 TDA18271HD 0.065 0.3 0.35 ...
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... NXP Semiconductors 18. Abbreviations Table 63. Acronym AGC BER CB CP DVB-T DVD-R ESD HBM IF LNA PCTV PLL QAM RoHS SAW SNR TS VCO 19. Revision history Table 64. Revision history Document ID Release date TDA18271HD_4 20090519 • Modifications: Figure 16 “Flowchart TDA18271RFtrackingFiltersCorrection” “RFCAL_TCOMP = dCoverdT x (TMVALUE_CURRENT - TMVALUE_RFCAL) / 1000” ...
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... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
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... NXP Semiconductors 22. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3.1 Target applications . . . . . . . . . . . . . . . . . . . . . . 1 3.2 Key benefi Quick reference data . . . . . . . . . . . . . . . . . . . . . 2 5 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 6 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 7.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 7.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 8 Functional description . . . . . . . . . . . . . . . . . . . 6 8.1 TV and FM reception . . . . . . . . . . . . . . . . . . . . 6 8.2 Master and slave operation ...