TDA18271HD/C2-T NXP Semiconductors, TDA18271HD/C2-T Datasheet - Page 39

• Manufacturer Part Number: TDA18271HD/C2-T
• Description: Tuners HYBRIDE
• Manufacturer: NXP Semiconductors

Specifications of TDA18271HD/C2-T

• Bus Type: I2C
• Maximum Agc: 71 dB
• Maximum Frequency: 864 MHz
• Minimum Frequency: 45 MHz
• Mounting Style: SMD/SMT
• Package / Case: HLQFN-64
• Function: TV
• Noise Figure: 5.5 dB
• Operating Supply Voltage: 3.3 V
• Supply Voltage (min): 3.13 V
• Supply Voltage (max): 3.47 V
• Minimum Operating Temperature: 0 C
• Maximum Operating Temperature: + 70 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: TDA18271HD/C2,518

NXP Semiconductors
TDA18271HD_4
Product data sheet
Fig 18. Flowchart TDA18271CalcMAINPLL
MAIN_POST_DIV
MAIN_PLL_map
freq_input
Div
freq_input
MAIN_DIV
9.4.13 Flowchart TDA18271CalcMAINPLL
9.4.14 Flowchart TDA18271CalcCALPLL
MPD, MD1, MD2 and MD3 are 8-bit registers. Arithmetical and logical operations
performed on these registers are handled as binary operations. Dividing is right shifting
and multiplying is left shifting.
Table 38.
CPD, CD1, CD2 and CD3 are 8-bit registers. Arithmetical and logical operations
performed on these registers are handled as binary operations. Dividing is right shifting
and multiplying is left shifting.
Function
Description
Input
Table
Output
Find MAIN_POST_DIV, Div = f
Update MPD byte
MAIN_DIV = (Div
Update MD1, MD2, MD3 bytes
Tuner registers update
TDA18271CalcMAINPLL
Description
finds the correct values for the bytes MPD,
MD1, MD2, MD3 and update the tuner registers
freq_input, MS
MAIN_PLL_map
-
Start TDA18271CalcMAINPLL
End TDA18271CalcMAINPLL
freq_input
Rev. 04 — 19 May 2009
LO(max)
2
7
) / 125
in MAIN_PLL_map
Internal table
MPD = MAIN_POST_DIV & 7Fh
MD1 = (MAIN_DIV / 2
MD2 = (MAIN_DIV / 2
MD3 = MAIN_DIV
-
Reference
Table 47 “MAIN_PLL_map”
TDA18271HD
16
8
)
) & 7Fh
MAIN_POST_DIV
Div
© NXP B.V. 2009. All rights reserved.
I
-
-
MPD … MD3
2
Silicon Tuner IC
C-bus
MAIN_DIV
MS
001aah054
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