XCV1000E-7FG680C Xilinx Inc, XCV1000E-7FG680C Datasheet - Page 82

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XCV1000E-7FG680C

Manufacturer Part Number
XCV1000E-7FG680C
Description
FPGA Virtex™-E Family 331.776K Gates 27648 Cells 400MHz 0.18um (CMOS) Technology 1.8V 680-Pin FBGA
Manufacturer
Xilinx Inc
Series
Virtex™-Er
Datasheets

Specifications of XCV1000E-7FG680C

Package
680FBGA
Family Name
Virtex™-E
Device Logic Gates
331776
Device Logic Units
27648
Device System Gates
1569178
Maximum Internal Frequency
400 MHz
Typical Operating Supply Voltage
1.8 V
Maximum Number Of User I/os
512
Ram Bits
393216
Number Of Logic Elements/cells
27648
Number Of Labs/clbs
6144
Total Ram Bits
393216
Number Of I /o
512
Number Of Gates
1569178
Voltage - Supply
1.71 V ~ 1.89 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
680-LBGA Exposed Pad
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Part Number
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Price
Part Number:
XCV1000E-7FG680C
Manufacturer:
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Quantity:
10 000
Part Number:
XCV1000E-7FG680C
Manufacturer:
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Virtex™-E 1.8 V Field Programmable Gate Arrays
DLL Timing Parameters
All devices are 100 percent functionally tested. Because of the difficulty in directly measuring many internal timing
parameters, those parameters are derived from benchmark timing patterns. The following guidelines reflect worst-case
values across the recommended operating conditions.
Module 3 of 4
22
Input Clock Frequency (CLKDLLHF)
Input Clock Low/High Pulse Width
Input Clock Frequency (CLKDLL)
Description
Output Jitter: the difference between an ideal
reference clock edge and the actual design.
Period Tolerance: the allowed input clock period change in nanoseconds.
Actual Period
Ideal Period
T CLKIN
FCLKINHF
FCLKINLF
Symbol
Figure 4: DLL Timing Waveforms
T
DLLPW
www.xilinx.com
1-800-255-7778
≥ 50 MHz
≥2 5 MHz
≥100 MHz
≥ 150
≥ 200
≥ 250
≥ 300
F
MHz
MHz
MHz
MHz
CLKIN
Phase Offset and Maximum Phase Difference
Min
5.0
3.0
2.4
2.0
1.8
1.5
1.3
60
25
+/- Jitter
+ Maximum
+ Phase Offset
Phase Difference
-8
Max
350
160
T CLKIN + T IPTOL
Speed Grade
ds022_24_091200
Min
_
5.0
3.0
2.4
2.0
1.8
1.5
1.3
60
25
-7
Production Product Specification
DS022-3 (v2.9.2) March 14, 2003
Max
320
160
Min
5.0
3.0
2.4
2.0
1.8
1.5
NA
60
25
-6
Max
275
135
Units
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
R

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