NLXT300ZPE.F4 Intel, NLXT300ZPE.F4 Datasheet - Page 8

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NLXT300ZPE.F4

Manufacturer Part Number
NLXT300ZPE.F4
Description
Manufacturer
Intel
Datasheet

Specifications of NLXT300ZPE.F4

Number Of Transceivers
1
Operating Supply Voltage (typ)
5V
Screening Level
Industrial
Mounting
Surface Mount
Operating Supply Voltage (min)
4.75V
Operating Supply Voltage (max)
5.25V
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Not Compliant
LXT300Z/LXT301Z — Advanced T1/E1 Short-Haul Transceivers
8
1. DI = Digital Input; DO = Digital Output; AI = Analog Input; AO = Analog Output; S = Supply.
Pin #
19
20
21
22
23
24
25
26
27
28
Table 1.
RLOOP
LLOOP
RRING
RGND
SCLK
CLKE
TAOS
RTIP
Sym
SDO
RV+
EC1
EC2
EC3
INT
SDI
CS
Pin Descriptions (Continued)
I/O
DO
DO
DI
DI
DI
DI
DI
DI
DI
DI
DI
DI
AI
AI
S
S
1
Receive Tip; Receive Ring. The AMI signal received from the line is applied at these pins. A
center-tapped, center-grounded, 2:1 step-up transformer is required on these pins. Data and
clock from the signal applied at these pins are recovered and output on the RPOS/RNEG and
RCLK pins.
Receive Power Supply. +5 VDC power supply for all circuits except the transmit drivers.
(Transmit drivers are supplied by TV+.)
Receive Ground. Ground return for power supply RV+.
Interrupt (LXT300Z - Host Mode). This output goes Low to flag the host processor when
LOS or DPM go active. INT is an open-drain output and should be tied to power supply RV+
through a resistor. INT is reset by clearing the respective register bit (LOS and/or DPM).
Equalizer Control 1 (LXT301Z and LXT300Z - H/W Mode). The signal applied at this pin is
used in conjunction with EC2 and EC3 inputs to determine shape and amplitude of AMI output
transmit pulses.
Serial Data In (LXT300Z - Host Mode). The serial data input stream is applied to this pin. SDI
is sampled on the rising edge of SCLK.
Equalizer Control 2 (LXT301Z and LXT300Z - H/W Mode). The signal applied at this pin is
used in conjunction with EC1 and EC3 inputs to determine shape and amplitude of AMI output
transmit pulses.
Serial Data Out (LXT300Z - Host Mode). The serial data from the on-chip register is output
on this pin. If CLKE is High, SDO is valid on the rising edge of SCLK. If CLKE is Low SDO is
valid on the falling edge of SCLK. This pin goes to a high-impedance state when the serial
port is being written to and when CS is High.
Equalizer Control 3 (LXT301Z and LXT300Z - H/W Mode). The signal applied at this pin is
used in conjunction with EC1 and EC2 inputs to determine shape and amplitude of AMI output
transmit pulses.
Chip Select (LXT300Z - Host Mode). This input is used to access the serial interface. For
each read or write operation, CS must transition from High to Low, and remain Low.
Remote Loopback (LXT301Z and LXT300Z - H/W Mode). Setting RLOOP High enables the
Remote Loopback mode. Setting both RLOOP and LLOOP High causes a Reset.
Serial Clock (LXT300Z - Host Mode). This clock is used to write data to or read data from the
serial interface registers.
Local Loopback (LXT301Z and LXT300Z - H/W Mode). This input controls loopback
functions. Setting LLOOP High enables the Local Loopback mode.
Clock Edge (LXT300Z - Host Mode). Setting CLKE High causes RPOS and RNEG to be
valid on the falling edge of RCLK, and SDO to be valid on the rising edge of SCLK. When
CLKE is Low, RPOS and RNEG are valid on the rising edge of RCLK, and SDO is valid on the
falling edge of SCLK.
Transmit All Ones (LXT301Z and LXT300Z - H/W Mode). When High, a continuous stream
of marks is transmitted at the TCLK frequency. Activating TAOS causes TPOS and TNEG
inputs to be ignored. TAOS is inhibited during Remote Loopback.
Description
Datasheet

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