TXC-03401BITQ Transwitch Corporation, TXC-03401BITQ Datasheet - Page 10

• Manufacturer Part Number: TXC-03401BITQ
• Manufacturer: Transwitch Corporation

Specifications of TXC-03401BITQ

• Number Of Transceivers: 1
• Operating Supply Voltage (typ): 5V
• Screening Level: Industrial
• Mounting: Surface Mount
• Package Type: TQFP
• Operating Supply Voltage (min): 4.75V
• Operating Supply Voltage (max): 5.25V
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Not Compliant

TRANSMIT TERMINAL SIDE INTERFACE
Symbol
XNIB3
XNIB2
XNIB1
XNIB0
XFNO
XDS/
XFSI
XCK
Pin No.
68-Pin
PLCC
Proprietary TranSwitch Corporation Information for use Solely by its Customers
50
56
58
59
60
62
2
Pin No.
80-Pin
TQFP
52
28
35
38
39
40
43
I/O/P
O
I
I
I
CMOS
- 10 of 54 -
TTLp
Type
4mA
TTL
TTL
DATA SHEET
Transmit Nibble Interface Framing Pulse: An
active low, one nibble clock cycle wide (XNC)
pulse that occurs during the second nibble time.
Serial Data Transmit Framing Pulse: A framing
pulse whose leading edge must be synchronous
with bit 1 in the transmit serial data DS3 frame.
The DS3F rewrites the 56 overhead bits based on
the location of the transmit framing pulse. If this
signal is held low for a duration greater than 1
frame, then all register bit positions at Addresses
02H-04H, 05H bit 6 and 08H-14H (except 10H bit
6) will be reset to 0 until the pin is taken high. The
XFSI pulse must not be applied while control bit
RTPLOOP is set to 1.
Transmit Nibble/Serial Interface: Nibble data is
clocked in on rising edges of the nibble clock
(XNC). There are 1176 nibbles in each frame.
The clock is stretched to accommodate the 56
overhead bits which are not required at the inter-
face. The DS3F inserts the X, F, C, P , and M over-
head bits into the transmitted frame based on the
framing pulse XFNO. The first bit transmitted in a
nibble is present on XNIB3. The nibble interface is
operational in the C-bit parity mode only. The
serial data should consist of all the bits in the
frame (4760 bits). The DS3F rewrites the 56 over-
head bits in the frame based on the location of the
framing pulse XFSI, when operating in the C-bit
parity mode. In the M13 operating mode, the 21
C-bits are treated as user data, while the other
overhead bits (X, F, P , and M bits) are written into
the DS3 frame by the DS3F. Serial data is clocked
into the DS3F on rising edges of the transmit
clock (XCK).
Transmit Clock: Provides the time base for the
transmitter in the DS3F. In order to meet cross-
connect objectives, the clock must operate at
44.736 Mbit/s with a stability of 20 ppm and a
duty cycle of (50 10)%. If XCK fails, the DS3F
uses the D3RC receive clock in its place.
Name/Function
TXC-03401B
TXC-03401B-MB
Ed. 6, June 2001
DS3F