SLXT336QE.B3 Intel, SLXT336QE.B3 Datasheet - Page 9

• Manufacturer Part Number: SLXT336QE.B3
• Manufacturer: Intel

Specifications of SLXT336QE.B3

• Operating Supply Voltage (typ): 5V
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Supply Voltage (min): 4.75V
• Operating Supply Voltage (max): 5.25V
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Not Compliant

Datasheet
1. Entries in I/O column are: DI = digital input; DO = digital output; DI/O = digital input/output; AI = analog input; AO = analog
Pin
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
#
output; S = supply. Note: Do not leave digital inputs floating, with the exception of not connected (NC) pins.
Table 1. LXT336 Pin Descriptions (Continued)
RNEG3/ BPV3
RNEG2/BPV2
RNEG1/BPV1
RNEG0/BPV0
RDATA3
RDATA2
RDATA1
RDATA0
RPOS3/
RPOS2/
RPOS1/
RPOS0/
RCLK3
RCLK2
RCLK1
RCLK0
CLKI3
GND
Sym
NC
NC
NC
NC
NC
I/O
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DI
S
-
-
-
-
-
1
Ground.
Clock Input - Port 3. See CLKI0, pin 2.
Not Connected. Must be left open.
Receive Negative Data/Bipolar Violation Indication Output–Port 3. All RNEGx/BPVx
pins are identical. In bipolar mode these pins act as active High bipolar non-return-to-zero
(NRZ) receive signal outputs. A High signal on RNEGx corresponds to receipt of a
negative pulse on RTIPx/RRINGx. A High signal on RPOSx corresponds to receipt of a
positive pulse on RTIPx/RRINGx. Both signals are valid on the same edge of RCLKx, as
determined by the CLKE pin.
In unipolar mode, the LXT336 asserts the BPVx pin High any time it senses an In-Service
Line Code violation.
In data recovery mode, this pin is an active Low RZ output. See RPOS3/RDATA3, pin 50;
and Functional Description.
Receive Positive Data/Receive Data Output–Port 3. A High signal on RPOSx
corresponds to receipt of a positive pulse on RTIPx/RRINGx.
In unipolar mode, the LXT336 asserts RDATAx High when a mark has been received. This
signal is valid on the edge of RCLKx as determined by the CLKE pin. RDATAx is an NRZ
receive data output.
In Data Recovery mode, this pin is an active Low RZ output. See RNEG3/BPV3, pin 49.
Receive Clock Output–Port 3. All RCLKx pins are identical. This pin provides the
recovered clock from the signal received at RTIPx and RRINGx. In loss of signal
conditions the LXT336 connects MCLK to this pin through internal circuitry.
Asserting the MCLK pin High disables the clock recovery circuit and internally connects
RPOSx and RNEGx to an XOR that is fed to the RCLKx output for external clock recovery
applications.
Receive Negative Data/Violation Indication Output–Port 2. See RNEG3/BPV3, pin 49;
RPOS3/RDATA3, pin 50.
Receive Positive Data/Receive Data Output–Port 2. See RPOS3/RDATA3, pin 50;
RNEG3/BPV3, pin 49.
In Data Recovery Mode, this signal is active Low.
Receive Clock Output–Port 2. See RCLK3, pin 51.
Not connected. Must be left open.
Not connected. Must be left open.
Not connected. Must be left open.
Not connected. Must be left open.
Receive Negative Data/Bipolar Violation Indication Output–Port 1. See RNEG3/
BPV3, pin 49; RPOS3/RDATA3, pin 50.
Receive Positive Data/Receive Data Output–Port 1. See RPOS3/RDATA3, pin 50;
RNEG3/BPV3, pin 49.
Receive Clock Output–Port 1. See RCLK3, pin 51.
Receive Negative Data/Bipolar Violation Indication Output–Port 0. See RNEG3/
BPV3, pin 49; RPOS3/RDATA3, pin 50.
Receive Positive Data/Receive Data Output–Port 0. See RPOS3/RDATA3, pin 50;
RNEG3/BPV3, pin 49.
Receive Clock Output–Port 0. See RCLK3, pin 51.
Description
Quad T1/E1 Receiver — LXT336
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