EELXT360PE.A2SE001 Intel, EELXT360PE.A2SE001 Datasheet - Page 10

• Manufacturer Part Number: EELXT360PE.A2SE001
• Manufacturer: Intel

Specifications of EELXT360PE.A2SE001

• Number Of Transceivers: 1
• Operating Supply Voltage (typ): 5V
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Supply Voltage (min): 4.75V
• Operating Supply Voltage (max): 5.25V
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Compliant

LXT360 — Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications
10
1. DI = Digital Input; DO = Digital Output; DI/O = Digital Input/Output; AI = Analog Input; AO = Analog Output.
2. Midrange is a voltage level such that 2.3 V
PLCC
1
2
3
4
5
6
7
Table 3.
Pin #
QFP
39
41
42
43
2
3
4
LXT360 Signal Descriptions
TNEG/INSBPV
TPOS/TDATA/
RPOS/RDATA
RNEG/BPV
Symbol
INSLER
MODE
MCLK
TCLK
I/O
DO
DO
DI
DI
DI
DI
DI
Midrange
1
Master Clock. External, independent clock signal required to generate
internal clocks. For T1 applications, a 1.544 MHz clock is required; for E1,
a 2.048 MHz clock. MCLK must be jitter-free and have an accuracy better
than ± 50 ppm with a typical duty cycle of 50%. Upon Loss of Signal (LOS),
RCLK is derived from MCLK.
Transmit Clock. For T1 applications, a 1.544 MHz clock is required; for
E1, a 2.048 MHz clock. The transceiver samples TPOS and TNEG on the
falling edge of TCLK (or MCLK, if TCLK is not present).
BIPOLAR MODES:
Transmit – Positive and Negative. TPOS and TNEG are the positive and
negative sides of a bipolar input pair. Data to be transmitted onto the
twisted-pair line is input at these pins. TPOS/TNEG are sampled on the
falling edge of TCLK (or MCLK, if TCLK is not present).
UNIPOLAR MODES:
Transmit Data. TDATA carries unipolar data to be transmitted onto the
twisted-pair line and is sampled on the falling edge of TCLK.
Transmit Insert Logic Error. In QRSS mode, a Low-to-High transition on
INSLER inserts a logic error into the transmitted QRSS data pattern. The
inserted error follows the data flow of the active loopback mode. The
LXT360 samples this pin on the falling edge of TCLK (or MCLK, if TCLK is
not present).
Transmit Insert Bipolar Violation. INSBPV is sampled on the falling edge
of TCLK (or MCLK, if TCLK is not present) to control Bipolar Violation
(BPV) insertions in the transmit data stream. A Low-to-High transition is
required to insert each BPV. In QRSS mode, the BPV is inserted into the
transmitted QRSS pattern.
Mode Select. Connect Low to select Hardware mode. Connect High to
select Host mode. See
modes.
BIPOLAR MODES:
Receive – Negative and Positive. RPOS and RNEG are the positive and
negative sides of a bipolar output pair. Data recovered from the line
interface is output on these pins. A signal on RNEG corresponds to receipt
of a negative pulse on RTIP/RRING. A signal on RPOS corresponds to
receipt of a positive pulse on RTIP/RRING. RNEG/RPOS are Non-Return-
to-Zero (NRZ). In Hardware mode, RPOS/RNEG are stable and valid on
the rising edge of RCLK. In Host mode, the CLKE pin selects the RCLK
clock edge when RPOS /RNEG are stable and valid as described in
4 on page
UNIPOLAR MODES:
Receive Bipolar Violation. BPV goes High to indicate detection of a
bipolar violation from the line. This is an NRZ output and is valid on the
rising edge of RCLK.
Receive Data. RDATA is the unipolar NRZ output of data recovered from
the line interface. In Hardware mode, RDATA is stable and valid on the
rising edge of RCLK. In Host mode, the CLKE pin selects the RCLK clock
edge when RDATA is stable and valid as described in
2.7 V. Midrange may also be established by letting the pin float.
18.
Table 5 on page 19
Description
for a complete list of operating
Table 4 on page
Datasheet
Table
18.