EELXT332PE.G2 S L8L8 Intel, EELXT332PE.G2 S L8L8 Datasheet - Page 14

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EELXT332PE.G2 S L8L8

Manufacturer Part Number
EELXT332PE.G2 S L8L8
Description
Manufacturer
Intel
Datasheet

Specifications of EELXT332PE.G2 S L8L8

Operating Supply Voltage (typ)
5V
Screening Level
Industrial
Mounting
Surface Mount
Operating Supply Voltage (min)
4.75V
Operating Supply Voltage (max)
5.25V
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Compliant
LXT332 — Dual T1/E1 Line Interface Unit with Crystal-less Jitter Attenuation
14
1.
2. DI = Digital Input; DO = Digital Output; DI/O = Digital Input/Output; AI = Analog Input; AO = Analog Output; S = Power
QFP
Pin
10
12
13
14
15
16
17
18
19
20
21
22
23
26
24
25
27
28
29
30
31
32
11
8
9
Table 1
Supply.
Table 3.
PLCC
describes the pins that do not change function in Unipolar Host mode and functions of pins unique to Bipolar mode.
Pin
14
17
15
16
18
19
20
21
22
23
24
25
26
27
28
29
32
30
31
33
34
35
36
37
38
Hardware Mode and Bipolar Hardware Mode Pin Descriptions
RLOOP0
RLOOP1
LLOOP0
LLOOP1
RRING0
RRING1
Symbol
TRING0
TRING1
TGND0
TGND1
TVCC0
TAOS1
TVCC1
JASEL
LEN01
LEN11
LEN21
TTIP0
RTIP0
RTIP1
TTIP1
LOS0
LOS1
DFM
VCC
I/O
DO
DO
DO
AO
AO
AO
AO
DI
AI
AI
DI
AI
AI
DI
DI
DI
DI
DI
DI
DI
S
S
S
S
S
2
Transmit Tip and Ring - Port 0. These pins are differential driver outputs designed to
drive a 35 - 200
give the desired pulse height. See
Ground - Port 0 Transmit Driver. Ground return for the TVCC0 power supply.
+ 5 VDC - Port 0 Transmit Driver. TVCC0 must not vary from TVCC1 or VCC by more
than ± 0.3 V.
Driver Failure Monitor. This signal goes High to indicate a driver output short in one
or both ports.
Remote Loopback Enable - Port 0. When High, the clock and data inputs (from the
framer) are ignored and the data received from the twisted-pair line is transmitted back
onto the line at the RCLK frequency. Note that if LLOOP is High, Remote Loopback is
inhibited (on the respective port).
Loss of Signal - Port 0. Goes High to indicate that 175 consecutive spaces were
detected. Returns Low when the received signal reaches a mark density of 12.5%
(determined by receipt of four marks within a sliding 32-bit period, with no more than 15
consecutive zeros). Received marks are output on RPOS/RNEG or RDATA when LOS
is High.
Receive Tip and Ring - Port 0. These pins comprise the port 0 receive line interface
and should be connected to the line through a center-tapped 1:2 transformer. See
Figure 14
Local Loopback Enable - Port 0. When High, the RTIP/RRING inputs are
disconnected and the transmit data inputs are routed back to the receive inputs
(through the JA if enabled). Note that if RLOOP is High, Local Loopback is inhibited (on
the respective port).
Receive Tip and Ring - Port 1. These pins comprise the receive line interface and
should be connected to the line through a center-tapped 1:2 transformer. See
14
Loss of Signal - Port 1. Refer to LOS0 for signal description.
Local Loopback Enable - Port 1. Refer to LLOOP0 for signal description.
Transmit All Ones Enable - Port 1. Refer to TAOS0 for signal description.
Transmit Tip and Ring - Port 1. These pins are differential driver outputs designed to
drive a 35 - 200
give the desired pulse height. See
+ 5 VDC - Port 1 Transmit Driver. TVCC1 must not vary from TVCC0 or VCC by more
than ± 0.3 V.
Ground - Port 1 Transmit Driver. Ground return for the TVCC1 power supply.
+5 VDC. Power supply for all circuits except the transmit drivers.
Jitter Attenuation Select - Port 0 and 1. When JASEL is High, the Jitter Attenuation
(JA) circuits are placed in the receive paths. When JASEL is Low, the JA circuits are
placed in the transmit paths. When JASEL is clocked with MCLK, the JA circuits are
disabled.
Line Length Equalizer - Port 1. These pins determine the shape and amplitude of the
transmit pulse. See
Remote Loopback Enable - Port 1. Refer to RLOOP0 for signal description.
through
through
Figure 16
Figure 16
load. Line matching resistors and transformers can be selected to
load. Line matching resistors and transformers can be selected to
Table 5
for details.
for details.
for details.
Figure 14
Figure 14
Description
through
through
Figure
Figure
1
(Continued)
16.
16.
Datasheet
Figure

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