RC82545GM Intel, RC82545GM Datasheet - Page 13

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RC82545GM

Manufacturer Part Number
RC82545GM
Description
Manufacturer
Intel
Datasheet

Specifications of RC82545GM

Operating Supply Voltage (typ)
1.5/2.5/3.3V
Operating Supply Voltage (min)
1.43/2.38/3V
Operating Supply Voltage (max)
1.57/2.62/3.6/5.25V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
364
Lead Free Status / RoHS Status
Not Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
RC82545GM
Manufacturer:
ACTEL
Quantity:
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Part Number:
RC82545GM
Manufacturer:
INTEL
Quantity:
20 000
3.0
3.1
3.2
Datasheet
Note: The targeted signal names are subject to change without notice. Verify with your local Intel sales
Note: The TTL inputs on the Ethernet controller are not 5V tolerant. If these inputs are connected to 5V,
Signal Descriptions
office that you have the latest information before finalizing a design.
Signal Type Definitions
The signals of the 82545GM controller are electrically defined as follows:
then damage to the Ethernet controller is likely to occur. TTL inputs include the JTAG interface
pins, the FLASH interface pins, the EEPROM interface pins, the LED pins, the software definable
pins, and the LAN_PWR_GOOD pin.
PCI Bus Interface
When the Reset signal (RST#) is asserted, the 82545GM will not drive any PCI output or bi-
directional pins except the Power Management Event signal (PME#).
I
O
TS
STS
OD
A
P
R
Name
Input. Standard input only digital signal.
Output. Standard output only digital signal.
Tri-state. Bi-directional three-state digital input/output signal.
Sustained Tri-state. Sustained digital three-state signal driven by one agent at a time.
An agent driving the STS pin low must actively drive it high for at least one clock before letting
it float. The next agent of the signal cannot drive the pin earlier than one clock after it has been
released by the previous agent.
Open Drain. Wired-OR with other agents.
The signaling agent asserts the OD signal, but the signal is returned to the inactive state by a
weak pull-up resistor. The pull-up resistor may require two or three clock periods to fully restore
the signal to the de-asserted state.
Analog. PHY analog data signal.
Power. Power connection, voltage reference, or other reference connection.
Reserved.
Definition
Networking Silicon — 82545GM
9

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