SI3011-F-FSR Silicon Laboratories Inc, SI3011-F-FSR Datasheet - Page 61

• Manufacturer Part Number: SI3011-F-FSR
• Manufacturer: Silicon Laboratories Inc

Specifications of SI3011-F-FSR

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Register 6. DAA Control 2
Reset settings = 0001_0000
Register 7. Sample Rate Control
Reset settings = 0000_0000
Bit
7:5
2:0
Bit
7:4
2:0
4
3
3
Name
Name
Type
Type
Bit
Bit
Reserved Read returns zero.
Reserved Read returns zero.
Reserved
Reserved
HSSM
Name
Name
PDN
PDL
D7
D7
Powerdown Line-Side Device.
0 = Normal operation. Program the clock generator before clearing this bit.
1 = Places the line-side device in lower power mode.
Powerdown System-Side Device.
0 = Normal operation.
1 = Powers down the system-side device. A pulse on RESET is required to restore normal
operation.
High-Speed Sampling Mode.
0 = Sample Rate is 8 kHz.
1 = Sample Rate is 16 kHz. The PCM or the GCI highway continues to be at 8 kHz; thus,
twice as many samples are generated per device timeslot. Samples are transmitted in adja-
cent timeslots.
Read returns zero.
Read returns zero.
D6
D6
D5
D5
Rev. 1.11
PDL
R/W
D4
D4
Function
Function
HSSM
PDN
R/W
R/W
D3
D3
Si3050 + Si3011
D2
D2
D1
D1
D0
D0
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