LULXT9785MBC.D0-865118 Cortina Systems Inc, LULXT9785MBC.D0-865118 Datasheet - Page 183

• Manufacturer Part Number: LULXT9785MBC.D0-865118
• Manufacturer: Cortina Systems Inc

Specifications of LULXT9785MBC.D0-865118

• Lead Free Status / RoHS Status: Compliant

LXT9785/LXT9785E
Datasheet
249241, Revision 11.0
16 April 2007
Figure 50
Table 72
Figure 51
Cortina Systems
SS-SMII - 10BASE-T Transmit Timing
SS-SMII - 10BASE-T Transmit Timing Parameters
RMII - 100BASE-TX Receive Timing
®
TxSYNC setup to TxCLK rising edge and
TxData setup to TxCLK rising edge
TxSYNC hold to TxCLK rising edge and TxData
hold from TxCLK rising edge
TxData to TPFO Latency
1. Typical values are at 25 °C and are for design aid only; not guaranteed and not subject to production
2. “BT” signifies bit times at the line rate (that is, BT = 100 ns if using 10BASE-T, BT = 10 ns if using
Note:
LXT9785 and LXT9785E Advanced 8-Port 10/100 Mbps PHY Transceivers
testing.
100BASE-TX or 100BASE-FX).
RxData[1:0]
The table latency values are derived with the hardware configuration pins FIFOSEL[1:0] set at a
default configuration of 00 (32 bits of initial fill).
CRS_DV
REFCLK
TxSYNC
TxData
TxCLK
TPFI
TPFO
Parameter
t
3
t
1
t
2
t
3
Sym
t1
t2
t3
t
1
Min
1.5
1.0
–
t
2
t
Typ1
1
10
–
–
t
t
4
2
Max
14
–
–
6.0 Test Specifications
Units
BT
ns
ns
2
Conditions
Test
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