PIC18F67J50T-I/PT Microchip Technology, PIC18F67J50T-I/PT Datasheet - Page 163
![IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC18F67J50T-I/PT
Manufacturer Part Number
PIC18F67J50T-I/PT
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F65J50-IPT.pdf
(480 pages)
3.PIC18F65J50-IPT.pdf
(16 pages)
Specifications of PIC18F67J50T-I/PT
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
49
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3904 B
Interface Type
I2C, MSSP, SPI, EUSART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
49
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183022, DM183032
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Height
1 mm
Length
10 mm
Supply Voltage (max)
2.75 V, 3.6 V, 3.9 V
Supply Voltage (min)
1.7 V, 2 V, 3 V
Width
10 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162087 - HEADER MPLAB ICD2 18F87J50 68/84MA180021 - MODULE PLUG-IN 18F87J50 FS USBAC164327 - MODULE SKT FOR 64TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
PIC18F67J50T-I/PTTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F67J50T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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- Download datasheet (8Mb)
TABLE 10-18: PORTH FUNCTIONS (CONTINUED)
TABLE 10-19: SUMMARY OF REGISTERS ASSOCIATED WITH PORTH
© 2009 Microchip Technology Inc.
RH7/PMWR/
AN15/P1B/
Legend:
Note 1:
PORTH
LATH
TRISH
ANCON1
Legend: Shaded cells are not used by PORTH.
Note 1:
Pin Name
Name
(1)
2:
2:
(1)
(1)
(2)
O = Output, I = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Buffer Input,
TTL = TTL Buffer Input, x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
Alternate assignments for P1B/P1C and P3B/P3C when ECCPMX Configuration bit is cleared. Default assignments are
PORTE<6:3>.
When PMPMX = 0.
Unimplemented on 64-pin devices, read as ‘0’.
Configuration SFR, overlaps with default SFR at this address; available only when WDTCON<4> = 1.
PCFG15
TRISH7
LATH7
Function
PMWR
Bit 7
RH7
P1B
AN15
RH7
(1)
(2)
Setting
PCFG14
TRISH6
LATH6
TRIS
Bit 6
RH6
0
1
x
x
0
I/O
O
O
O
I
I
I
PCFG13
TRISH5
LATH5
Bit 5
RH5
Type
ANA
DIG
DIG
TTL
DIG
I/O
ST
LATH<7> data output.
PORTH<7> data input.
Parallel Master Port write strobe.
Parallel Master Port write in.
A/D input channel 15. Default input configuration on POR; does not affect
digital output.
ECCP1 Enhanced PWM output, channel B; takes priority over port and PMP
data. May be configured for tri-state during Enhanced PWM shutdown events.
PCFG12
TRISH4
LATH4
Bit 4
RH4
PIC18F87J50 FAMILY
PCFG11
TRISH3
LATH3
Bit 3
RH3
PCFG10
TRISH2
LATH2
Bit 2
RH2
Description
TRISH1
LATH1
Bit 1
RH1
—
TRISH0
LATH0
Bit 0
RH0
—
DS39775C-page 163
on Page:
Values
Reset
64
65
64
63
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