PIC18F86J50T-I/PT Microchip Technology, PIC18F86J50T-I/PT Datasheet - Page 114
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PIC18F86J50T-I/PT
Manufacturer Part Number
PIC18F86J50T-I/PT
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Specifications of PIC18F86J50T-I/PT
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
65
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3904 B
Interface Type
I2C, MSSP, SPI, EUSART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
65
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183022, DM183032
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162087 - HEADER MPLAB ICD2 18F87J50 68/84MA180021 - MODULE PLUG-IN 18F87J50 FS USBAC164328 - MODULE SKT FOR 80TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
PIC18F86J50T-I/PTTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F86J50T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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PIC18F87J50 FAMILY
7.6.4
The presentation of control signals on the External
Memory Bus is different for the various operating
modes. Typical signal timing diagrams are shown in
Figure 7-4 and Figure 7-5.
FIGURE 7-4:
FIGURE 7-5:
DS39775C-page 114
Instruction
AD<15:0>
Execution
Instruction
A<19:16>
AD<15:0>
Execution
A<19:16>
Memory
Memory
Cycle
Cycle
ALE
ALE
OE
CE
OE
CE
16-BIT MODE TIMING
Q1
Q1
3AAAh
EXTERNAL MEMORY BUS TIMING FOR TBLRD (EXTENDED
MICROCONTROLLER MODE)
EXTERNAL MEMORY BUS TIMING FOR SLEEP (EXTENDED
MICROCONTROLLER MODE)
Opcode Fetch
from 000100h
INST(PC – 2)
Opcode Fetch
from 007554h
INST(PC – 2)
TBLRD *
Q2
Q2
SLEEP
00h
Q3
Q3
0003h
Q4
Q4
Q1
Q1
3AABh
TBLRD Cycle 1
Opcode Fetch
from 000102h
Opcode Fetch
from 007556h
MOVLW 55h
MOVLW 55h
Q2
Q2
SLEEP
00h
Q3
Q3
0E55h
Q4
Q4
Q1
Q1
CF33h
TBLRD Cycle 2
from 199E67h
TBLRD 92h
Q2
0Ch
Q3
Sleep Mode,
9256h
Q4
© 2009 Microchip Technology Inc.
Q1
Bus Inactive
Opcode Fetch
from 000104h
ADDLW 55h
Q2
MOVLW
Q3
Q4
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