PIC18F86J50T-I/PT Microchip Technology, PIC18F86J50T-I/PT Datasheet - Page 303
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PIC18F86J50T-I/PT
Manufacturer Part Number
PIC18F86J50T-I/PT
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Specifications of PIC18F86J50T-I/PT
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
65
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3904 B
Interface Type
I2C, MSSP, SPI, EUSART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
65
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183022, DM183032
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162087 - HEADER MPLAB ICD2 18F87J50 68/84MA180021 - MODULE PLUG-IN 18F87J50 FS USBAC164328 - MODULE SKT FOR 80TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
PIC18F86J50T-I/PTTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F86J50T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- Current page: 303 of 480
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The ANCON0 and ANCON1 registers are used to
configure the operation of the I/O pin associated with
each analog channel. Setting any one of the PCFG bits
configures the corresponding pin to operate as a digital
only I/O. Clearing a bit configures the pin to operate as
an analog input for either the A/D Converter or the com-
parator module; all digital peripherals are disabled, and
digital inputs read as ‘0’. As a rule, I/O pins that are
multiplexed with analog inputs default to analog
operation on device Resets.
REGISTER 21-3:
REGISTER 21-4:
© 2009 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6-5
bit 4-0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-2
bit 1-0
Note 1:
PCFG15
PCFG7
R/W-0
R/W-0
AN15 through AN12 are available only in 80-pin devices.
PCFG7: Analog Port Configuration bits (AN7)
1 = Pin configured as a digital port
0 = Pin configured as an analog channel - digital input disabled and reads ‘0’
Unimplemented: Read as ‘0’
PCFG4:PCFG0: Analog Port Configuration bits (AN4-AN0)
1 = Pin configured as a digital port
0 = Pin configured as an analog channel - digital input disabled and reads ‘0’
PCFG15:PCFG10: Analog Port Configuration bits (AN15-AN10)
1 = Pin configured as a digital port
0 = Pin configured as an analog channel - digital input disabled and reads ‘0’
Unimplemented: Read as ‘0’
PCFG14
R/W-0
U-0
—
ANCON0: A/D PORT CONFIGURATION REGISTER 2
ANCON1: A/D PORT CONFIGURATION REGISTER 1
W = Writable bit
W = Writable bit
‘1’ = Bit is set
‘1’ = Bit is set
PCFG13
R/W-0
U-0
—
PCFG12
PCFG4
R/W-0
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PIC18F87J50 FAMILY
PCFG11
PCFG3
R/W-0
R/W-0
ANCON0 and ANCON1 are shared address SFRs, and
use the same addresses as the ADCON1 and
ADCON0 registers. The ANCON registers are
accessed by setting the ADSHR bit (WDTCON<4>).
See Section 5.3.5.1 “Shared Address SFRs” for
more information.
PCFG10
PCFG2
R/W-0
R/W-0
(1)
x = Bit is unknown
x = Bit is unknown
PCFG1
R/W-0
U-0
—
DS39775C-page 303
PCFG0
R/W-0
U-0
—
bit 0
bit 0
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