SST25VF064C-80-4C-Q2AE Microchip Technology, SST25VF064C-80-4C-Q2AE Datasheet - Page 24

• Manufacturer Part Number: SST25VF064C-80-4C-Q2AE
• Description: 2.7V To 3.6V 64Mbit SPI Serial Flash 8 TDFN 6x8x0.8mm TRAY
• Manufacturer: Microchip Technology

Specifications of SST25VF064C-80-4C-Q2AE

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 64M (8M x 8)
• Speed: 80MHz
• Interface: SPI Serial
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-WDFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Data Sheet
TABLE 12: Reliability Characteristics
TABLE 13: AC Operating Characteristics
©2010 Silicon Storage Technology, Inc.
Symbol
N
T
I
Symbol
F
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
LTH
DR
CLK
SCKH
SCKL
SCKR
SCKF
CES
CEH
CHS
CHH
CPH
CHZ
CLZ
DS
DH
HLS
HHS
HLH
HHH
HZ
LZ
OH
V
SE
BE
SCE
PP
PSID
END
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
1. Maximum clock frequency for Read Instruction, 03H, is 33 MHz
2. Maximum Rise and Fall time may be limited by T
3. Relative to SCK.
4. Not 100% tested in production.
4
1
4
1
1
3
4
3
3
Maximum clock frequency Fast-Read Dual-Output (3BH) is 75 MHz
Maximum clock frequency Fast-Read Dual I/O (BBH) is 50 MHz
Maximum clock frequency for High-Speed Read, OBH, is 80 MHz
Maximum clock frequency for Dual-Input Page-Program, A2H, is 50 Mhz
1
3
2
Serial Clock Frequency High-Speed Read
Serial Clock High Time
Serial Clock Low Time
Serial Clock Rise Time (Slew Rate)
Serial Clock Fall Time (Slew Rate)
CE# Active Setup Time
CE# Active Hold Time
CE# Not Active Setup Time
CE# Not Active Hold Time
CE# High Time
CE# High to High-Z Output
SCK Low to Low-Z Output
Data In Setup Time
Data In Hold Time
HOLD# Low Setup Time
HOLD# High Setup Time
HOLD# Low Hold Time
HOLD# High Hold Time
HOLD# Low to High-Z Output
HOLD# High to Low-Z Output
Output Hold from SCK Change
Output Valid from SCK
Sector-Erase
Block-Erase
Chip-Erase
Page-Program
Program Security ID
Parameter
Endurance
Data Retention
Latch Up
Parameter
SCKH
and T
SCKL
Minimum Specification
Min
0.1
0.1
13
13
50
5
5
5
5
0
3
5
5
5
5
5
0
24
33 MHz
requirements
100 + I
10,000
100
Max
2.5
1.0
33
15
25
25
50
7
7
7
DD
64 Mbit SPI Serial Dual I/O Flash
Min
0.1
0.1
50
9
9
5
5
5
5
0
3
5
5
5
5
5
0
50 MHz
Cycles
Units
Years
Max
2.5
1.0
mA
50
10
25
25
50
7
7
7
Test Method
JEDEC Standard A117
JEDEC Standard A103
JEDEC Standard 78
Min
0.1
0.1
50
6
6
5
5
5
5
0
2
4
5
5
5
5
0
75/80 MHz
SST25VF064C
S71392-04-000
75/80
Max
2.5
1.0
25
25
50
7
7
7
6
T12.0 1392
T13.1 1392
Units
MHz
V/ns
V/ns
ms
ms
ms
ms
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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