SST25VF064C-80-4I-SCE-T Microchip Technology, SST25VF064C-80-4I-SCE-T Datasheet - Page 13

• Manufacturer Part Number: SST25VF064C-80-4I-SCE-T
• Description: 2.7V To 3.6V 64Mbit SPI Serial Flash 16 SOIC .300in T/R
• Manufacturer: Microchip Technology

Specifications of SST25VF064C-80-4I-SCE-T

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 64M (8M x 8)
• Speed: 80MHz
• Interface: SPI Serial
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 16-SOIC (0.300", 7.50mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

64 Mbit SPI Serial Dual I/O Flash
SST25VF064C
Page-Program
The page-Program instruction programs up to 256 bytes of
data in the memory. The selected page address must be in
the erased state (FFH) before initiating the Page-Program
operation. A Page-Program applied to a protected memory
area will be ignored.
Prior to the program operation, the Write-Enabled (WREN)
instruction must be executed. CE# must remain active low
for the duration of the Page-Program instruction. The Page-
Program instruction is initiated by executing an 8-bit com-
mand, 02H, followed by address bits A23-A0. Following the
address, at least one byte is needed for the data input. CE#
must be driven high before the instruction is executed. The
user may poll the Busy bit in the software status register or
©2010 Silicon Storage Technology, Inc.
FIGURE 10: Page-Program Sequence
SCK
SCK
CE#
CE#
SO
SO
SI
SI
MODE 3
MODE 0
MSB
40 41 42 43 44 45 46 47 48
MSB
Data Byte 2
0 1 2 3 4 5 6 7 8
02
LSB
MSB
LSB
HIGH IMPEDANCE
HIGH IMPEDANCE
49
MSB
50 51 52 53 54 55
Data Byte 3
ADD.
13
15 16
wait T
Program operation. See Figure 10 for the Page-Program
sequence.
For Page-Program, the memory range for SST25VF064C
is set in 256 byte page boundaries. The device handles
shifting of more than 256 bytes of data by keeping the last
256 bytes of data shifted as the correct data to be pro-
grammed. If the target address for the Page-Program
instruction is not the beginning of the page boundary (A7-
A0 are not all zero) and the number of data input exceeds
or overlaps the end of the address of the page boundary,
the excess data inputs will wrap around and will be pro-
grammed at the start of that target page.
ADD.
LSB
PP
23 24
for the completion of the internal self-timed Page-
MSB
ADD.
LSB
Data Byte 256
31 32
MSB
Data Byte 1
LSB
39
1392 F30.0
LSB
S71392-04-000
Data Sheet
04/10