SST25VF064C-80-4I-SCE-T Microchip Technology, SST25VF064C-80-4I-SCE-T Datasheet - Page 7

2.7V To 3.6V 64Mbit SPI Serial Flash 16 SOIC .300in T/R

SST25VF064C-80-4I-SCE-T

Manufacturer Part Number
SST25VF064C-80-4I-SCE-T
Description
2.7V To 3.6V 64Mbit SPI Serial Flash 16 SOIC .300in T/R
Manufacturer
Microchip Technology
Datasheet

Specifications of SST25VF064C-80-4I-SCE-T

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
64M (8M x 8)
Speed
80MHz
Interface
SPI Serial
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
16-SOIC (0.300", 7.50mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
64 Mbit SPI Serial Dual I/O Flash
SST25VF064C
Status Register
The software status register provides status on whether the
flash memory array is available for any Read or Write oper-
ation, whether the device is Write enabled, and the state of
the Memory Write protection. During an internal Erase or
TABLE 4: Status Register
Busy
The Busy bit determines whether there is an internal Erase
or Program operation in progress. A ‘1’ for the Busy bit indi-
cates the device is busy with an operation in progress. A ‘0’
indicates the device is ready for the next valid operation.
Write Enable Latch (WEL)
The Write-Enable-Latch bit indicates the status of the inter-
nal memory Write Enable Latch. If the Write-Enable-Latch
bit is set to ‘1’, it indicates the device is Write enabled. If the
bit is set to ‘0’ (reset), it indicates the device is not Write
enabled and does not accept any memory Write (Program/
Erase) commands. The Write-Enable-Latch bit is automati-
cally reset under the following conditions:
©2010 Silicon Storage Technology, Inc.
Bit
0
1
2
3
4
5
6
7
1. The Security ID status will always be ‘1’ at power-up after a successful execution of the Lockout SID instruction; otherwise, the
Power-up
Write-Disable (WRDI) instruction completion
Write-Status Register instruction completion
Page-Program instruction completion
Dual-Input Page-Program instruction completion
Sector-Erase instruction completion
Block-Erase instruction completion
Chip-Erase instruction completion
Program SID instruction completion
Lockout SID instruction completion
default at power up is ‘0’.
Name
BUSY
WEL
BP0
BP1
BP2
BP3
SEC
BPL
1
Function
1 = Internal Write operation is in progress
0 = No internal Write operation is in progress
1 = Device is memory Write enabled
0 = Device is not memory Write enabled
Indicate current level of block write protection (See Table 5)
Indicate current level of block write protection (See Table 5)
Indicate current level of block write protection (See Table 5)
Indicate current level of block write protection (See Table 5)
Security ID status
1 = Security ID space locked
0 = Security ID space not locked
1 = BP3, BP2, BP1, BP0 are read-only bits
0 = BP3, BP2, BP1, BP0 are readable/writable
7
Program operation, the status register may be read only to
determine the completion of an operation in progress.
Table 4 describes the function of each bit in the software
status register.
Default at
Power-up
0
0
0
1
1
1
1
0
1
S71392-04-000
Read/Write
Data Sheet
R/W
R/W
R/W
R/W
R/W
R
R
R
T4.0 1392
04/10

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