CY7C68000-48BAC Cypress Semiconductor Corp, CY7C68000-48BAC Datasheet - Page 2

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CY7C68000-48BAC

Manufacturer Part Number
CY7C68000-48BAC
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C68000-48BAC

Number Of Transceivers
1
Power Supply Requirement
Single
Operating Supply Voltage (typ)
3.3V
Operating Temperature Classification
Commercial
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Dual Supply Voltage (typ)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Dual Supply Voltage (min)
Not RequiredV
Mounting
Surface Mount
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Lead Free Status / RoHS Status
Not Compliant
1.0 EZ-USB TX2 FEATURES ................................................................................................................ 3
2.0 APPLICATIONS ............................................................................................................................... 4
3.0 FUNCTIONAL OVERVIEW .............................................................................................................. 4
4.0 DPLUS/DMINUS IMPEDANCE TERMINATION .............................................................................. 5
5.0 PIN ASSIGNMENTS ........................................................................................................................ 5
6.0 ABSOLUTE MAXIMUM RATINGS ................................................................................................ 10
7.0 OPERATING CONDITIONS ........................................................................................................... 10
8.0 DC CHARACTERISTICS ............................................................................................................... 10
9.0 AC ELECTRICAL CHARACTERISTICS ....................................................................................... 11
10.0 ORDERING INFORMATION ........................................................................................................ 12
11.0 PACKAGE DIAGRAMS ............................................................................................................... 12
Figure 1-1. Block Diagram ....................................................................................................................... 3
Figure 5-1. CY7C68000 48-pin FBGA Pin Assignment ........................................................................... 5
Figure 5-2. CY7C68000 56-pin SSOP Pin Assignment ........................................................................... 6
Figure 9-1. 60-MHz Interface Timing Constraints .................................................................................. 11
Figure 9-2. 30-MHz Timing Interface Timing Constraints ...................................................................... 11
Figure 11-1. 56-lead Shrunk Small Outline Package O56 ..................................................................... 12
Figure 11-2. 48-pin Fine Pitch Ball Grid Array (7 x 7 x 1.2 mm) BA48A ................................................ 13
Table 5-1. Pin Descriptions ..................................................................................................................... 6
Table 8-1. DC Characteristics ............................................................................................................... 10
Table 9-1. 60-MHz Interface Timing Constraints Parameters .............................................................. 11
Table 9-2. 30 MHz Timing Interface Timing Constraints Parameters ................................................... 11
Table 10-1. Ordering Information .......................................................................................................... 12
Document #: 38-08016 Rev. *C
3.1 USB Signaling Speed ................................................................................................................. 4
3.2 Transceiver Clock Frequency ..................................................................................................... 4
3.3 Buses .......................................................................................................................................... 4
3.4 Reset Pin .................................................................................................................................... 4
3.5 Line State .................................................................................................................................... 4
3.6 Full-speed vs. High-speed Select ............................................................................................... 4
3.7 Operational Modes ...................................................................................................................... 4
5.1 CY7C68000 Pin Descriptions ..................................................................................................... 6
8.1 USB 2.0 Transceiver ................................................................................................................. 10
9.1 USB 2.0 Transceiver ................................................................................................................. 11
9.2 Timing Diagram ......................................................................................................................... 11
9.2.1 HS/FS Interface Timing–60 MHz
9.2.2 HS/FS Interface Timing–30 MHz ....................................................................................................11
TABLE OF CONTENTS
LIST OF FIGURES
LIST OF TABLES
.................................................................................................. 11
CY7C68000
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