AD73411BBZ-80 Analog Devices Inc, AD73411BBZ-80 Datasheet - Page 11

• Manufacturer Part Number: AD73411BBZ-80
• Manufacturer: Analog Devices Inc

Specifications of AD73411BBZ-80

• Single Supply Voltage (typ): 3.3V
• Single Supply Voltage (min): 3V
• Single Supply Voltage (max): 3.6V
• Package Type: BGA
• Lead Free Status / RoHS Status: Compliant

Analog Sigma-Delta Modulator
The AD73411 input channel employs a sigma-delta conver-
sion technique, which provides a high resolution 16-bit output
with system filtering being implemented on-chip.
Sigma-delta converters employ a technique known as over-
sampling, where the sampling rate is many times the highest
frequency of interest. In the case of the AD73411, the initial
sampling rate of the sigma-delta modulator is DMCLK/8. The
main effect of oversampling is that the quantization noise is
spread over a very wide bandwidth, up to f
(Figure 3a). This means that the noise in the band of interest is
much reduced. Another complementary feature of sigma-delta
converters is the use of a technique called noise-shaping. This
technique has the effect of pushing the noise from the band of
interest to an out-of-band position (Figure 3b). The combina-
tion of these techniques, followed by the application of a digital
filter, sufficiently reduces the noise in band to ensure good
dynamic performance from the part (Figure 3c).
Figure 4 shows the various stages of filtering that are employed
in a typical AD73411 application. In Figure 4a we see the
transfer function of the external analog antialias filter. Even
though it is a single RC pole, its cutoff frequency is sufficiently
far away from the initial sampling frequency (DMCLK/8) that it
takes care of any signals that could be aliased by the sampling
frequency. This also shows the major difference between the
initial oversampling rate and the bandwidth of interest. In Figure
4b, the signal and noise-shaping responses of the sigma-delta
modulator are shown. The signal response provides further
rejection of any high frequency signals while the noise-shaping
will push the inherent quantization noise to an out-of-band
position. The detail of Figure 4c shows the response of the
digital decimation filter (Sinc-cubed response) with nulls every
INTEREST
INTEREST
INTEREST
BAND
BAND
BAND
OF
OF
OF
NOISE-SHAPING
DIGITAL FILTER
.
S
/2 = DMCLK/16
DMCLK/16
DMCLK/16
DMCLK/16
f
S
f
f
/2
S
S
/2
/2
multiple of DMCLK/256, which is the decimation filter update
rate. The final detail in Figure 4d shows the application of a
final antialias filter in the DSP engine. This has the advantage of
being implemented according to the user’s requirements and
available MIPS. The filtering in Figures 4a through 4c is imple-
mented in the AD73411.
Decimation Filter
The digital filter used in the AD73411 carries out two impor-
tant functions. Firstly, it removes the out-of-band quantization
noise, which is shaped by the analog modulator and secondly, it
decimates the high-frequency bitstream to a lower rate 15-bit word.
The antialiasing decimation filter is a sinc-cubed digital filter that
reduces the sampling rate from DMCLK/8 at the modulator to
an output rate at the SPORT of DMCLK/M (where M depends
on the sample rate setting—M = 256 @ 64 kHz; M = 512 @
32 kHz, M = 1024 @ 16 kHz, M = 2048 @ 8 kHz), and increases
the resolution from a single bit to 15 bits. Its Z transform is given
as: [(1–Z
(N = 32 @ 64 kHz, N = 64 @ 32 kHz, N = 128 @ 16 kHz, N =
256 @ 8 kHz). This ensures a minimal group delay of 25 µs at the
64 kHz sampling rate.
F
F
–N
B
F
B
B
= 4kHz
= 4kHz
)/(1–Z
F
= 4kHz F
B
= 4kHz F
–1
SIGNAL TRANSFER FUNCTION
)]
SINTER
3
SFINAL
where N is determined by the sampling rate
= DMCLK/256
= 8kHz
NOISE TRANSFER FUNCTION
F
SINTER
= DMCLK/256
F
F
SINIT
SINIT
AD73411
= DMCLK/8
= DMCLK/8