UCB1400BE128 NXP Semiconductors, UCB1400BE128 Datasheet
UCB1400BE128
Specifications of UCB1400BE128
Related parts for UCB1400BE128
UCB1400BE128 Summary of contents
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IMPORTANT NOTICE Dear customer from August 2 2008, the wireless operations of NXP have moved to a new company, ST-NXP Wireless result, the following changes are applicable to the attached document. ● Company name - Philips ...
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... AC link host controller such as the Intel Xscale™ processor. The stereo audio codec inputs connect directly to a microphone or line level sources such player. The stereo audio codec outputs at line level and can drive a headphone directly. The touch screen interface connects directly to a 4-wire resistive touch screen ...
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... Block diagram TSPX TSMX TSPY TSMY ADCSYNC XTL_IN XTL_OUT IO[9:0] Fig 1. Block diagram. 9397 750 09611 Product data Audio codec with touch screen controller AD[3:0] TOUCH MUX I/F VOLTAGE 10-BIT ADC REFERENCE AC LINK I/O AND CONTROL OSC 2-CHANNEL 20-BIT AUDIO DAC ...
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... Pin description Table 2: Total pin count = 48 Symbol AC-link, crystal and interrupt interface (pin count = 8) XTL_IN XTL_OUT RESET SYNC BIT_CLK SDATA_OUT SDATA_IN IRQOUT 9397 750 09611 Product data Audio codec with touch screen controller DVDD1 1 XTL_IN 2 XTL_OUT 3 DVSS1 4 SDATA_OUT 5 BIT_CLK 6 UCB1400 DVSS2 ...
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... IO[9:0] Power and miscellaneous (pin count = 15) DVDD2, DVDD1 DVSS2, DVSS1 7, 4 AVDD3, AVDD2, AVDD1 AVSS3, AVSS2, AVSS1 VREFDRV VREF VADCP VADCN VREFBYP 9397 750 09611 Product data Audio codec with touch screen controller Pin description …continued Pin Type Default state closed ...
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... STATUS/CLEAR (0x62) ADC READY MUX (0x64, 0x66) ADC ADC DATA CONTROL (0x66) DATA (0x68) Rev. 02 — 21 June 2002 UCB1400 Audio codec with touch screen controller and power management monitor DSP (0x6A) SHAPER LOOP BACK (0x20) DECIMATION FILTER OVFL AC97 / AUDIO POWER UP/DOWN ...
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... After signaling a reset to UCB1400, the AC ’97 Controller should not attempt to play or capture audio data until it has sampled a “Codec Ready” indication from UCB1400. 9397 750 09611 Product data Audio codec with touch screen controller and power management monitor SYNC BIT_CLK SDATA_OUT ...
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... LINE 1 PCM DATA L R DAC CENTER PCM PCM LINE 1 MIC DATA L R ADC ADC Rev. 02 — 21 June 2002 UCB1400 Audio codec with touch screen controller and power management monitor PCM PCM PCM LINE 2 HSET L SURR R SURR LFE DAC DAC PCM L PCM R ...
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... AC-link protocol. (Note that Bits 1 and 0 of 8.4. 20.8 s (48 kHz) slot(12) “0” SLOT 1 Rev. 02 — 21 June 2002 UCB1400 Audio codec with touch screen controller and power management monitor DATA PHASE SLOT 2 SLOT 3 SLOT 12 © Koninklijke Philips Electronics N.V. 2002. All rights reserved. 0 SN00221 ...
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... The trailing 12 bit positions within the slot are reserved and must be stuffed with 0s by the AC ’97 Controller. 9397 750 09611 Product data Audio codec with touch screen controller AC ’97 SAMPLES SYNC ASSERTION HERE SYNC AC ’97 SAMPLES FIRST SDATA_OUT BIT OF FRAME HERE ...
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... Product data Audio codec with touch screen controller The command data port is used to deliver 16-bit Audio output frame slot 3 is the composite Audio output frame slot 4 is the composite All other audio output frame slots are ignored by the UCB1400. Within slot 0, the fi ...
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... SLOT 1 AC ’97 SAMPLES SYNC ASSERTION HERE SYNC BIT_CLK END OF PREVIOUS CODEC SDATA_IN AUDIO FRAME READY Rev. 02 — 21 June 2002 UCB1400 Audio codec with touch screen controller and power management monitor DATA PHASE SLOT 2 SLOT 3 SLOT 12 AC ’97 CONTROLLER SAMPLES FIRST ...
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... IRQOUT). 9397 750 09611 Product data Audio codec with touch screen controller The status port is used to monitor status for UCB1400 The status data port delivers 16-bit control register read Audio input frame slot 3 is the left channel output ...
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... Once the UCB1400 has been instructed to halt BIT_CLK, a special ‘wake-up’ protocol must be used to bring the AC-link to the active mode since normal audio output and input frames cannot be communicated in the absence of BIT_CLK. 9397 750 09611 Product data Audio codec with touch screen controller Slot 12 definition GPIO Name Sense ...
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... Product data Audio codec with touch screen controller There are two methods for bringing the AC-link out of a low A cold reset is achieved by asserting RESET for the minimum A warm AC ’97 reset will re-activate the AC-link without altering AC-link audio output frame slot 0 bit allocation ...
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... SDATA_OUT UCB1400 status frame N+ response to AC ’97 digital controller secondary read or write frame N, SDATA_IN 9397 750 09611 Product data Audio codec with touch screen controller and power management monitor Table 5. Note that although SLOTREQ bits Section 8.5). Slot 0, bit 14 Slot 0, bit 13 ...
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... SDATA_IN from LOW to HIGH. The UCB1400 shall keep SDATA_IN HIGH until it has sampled SYNC having gone HIGH, and then LOW. 9397 750 09611 Product data Audio codec with touch screen controller and power management monitor Rev. 02 — 21 June 2002 UCB1400 Section 8 ...
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... Refer to 9397 750 09611 Product data SLEEP STATE Data PR4 Section 12 “Register definition” Rev. 02 — 21 June 2002 UCB1400 Audio codec with touch screen controller and power management monitor WAKE EVENT NEW AUDIO FRAME TAG Slot 1 TAG Slot 1 for details. © Koninklijke Philips Electronics N.V. 2002. All rights reserved. ...
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... D OR TREE R D xxxN R xxxS READ Rev. 02 — 21 June 2002 UCB1400 Audio codec with touch screen controller and power management monitor IO[x] SN00225 IRQOUT TO AC97 GPIO_INT AND WAKE-UP BLOCK GIEN SN00239 © Koninklijke Philips Electronics N.V. 2002. All rights reserved. ...
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... GPIO_INT bit of input slot 12 when BIT_CLK is on. • Rising SDATA_IN when BIT_CLK is off. 9397 750 09611 Product data Audio codec with touch screen controller and power management monitor Rev. 02 — 21 June 2002 UCB1400 © Koninklijke Philips Electronics N.V. 2002. All rights reserved. ...
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... PLL SR = LINE_IN_R ADC LINE_IN_L 1 ADC 0 OVERLOAD DETECTION (SL = MIC) & NOT POWERED DOWN Rev. 02 — 21 June 2002 UCB1400 Audio codec with touch screen controller and power management monitor LEFT, RIGHT 0 FROM AC LINK DSP FEATURES 1 LPBK DAC CLOCKS ADC CLOCKS DC, HIPS, GL, GR, RM DECIMATION ...
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... GL[3:0] and GR[3:0] bits in the Record Gain Register (0x1C). 9.1.2 Microphone input The UCB1400 audio codec input path accepts microphone signals via a DC blocking capacitor. The ‘ground’ side of the microphone is either connected to the analog ground (AV ...
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... This noise shaping technique enables high signal-to-noise ratios to be achieved. The noise shaper output is converted into an analog signal using a Filter Stream Digital-to-Analog Converter (FSDAC). 9397 750 09611 Product data Audio codec with touch screen controller Interpolation filter characteristics Condition 0 to 0.45 fs > 0. 0.45 fs Rev. 02 — ...
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... INT Clear/Status register (index 0x62). The user can subsequently examine the Extra Interrupt register (0x70) to determine the source of the short circuit. Fig 16. Headphone connections. 9397 750 09611 Product data Audio codec with touch screen controller and power management monitor UCB1400 LINE_OUT_L VREFDRV ...
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... The output path is disabled when the PR1 bit of the same register is set. This provides the user the means to reduce the current consumption of UCB1400 if one part of the audio codec is not used in the application. When both the input and output paths are disabled, the PR3 bit of the same register can also be set to turn off the audio reference to further reduce power consumption ...
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... The flexible switch matrix and the multi-functional touch screen bias circuit enable the user of the UCB1400 to set each desired touch screen configuration. 9397 750 09611 Product data Audio codec with touch screen controller TSPX TSMX TSPY TSMY ...
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... Position Touch screen bias circuit TSMY TSMX TSPY TO ADC Rev. 02 — 21 June 2002 UCB1400 Audio codec with touch screen controller and power management monitor ) acts as the reference voltage for the ref ADC multiplexer setting Defined by AI[2:0] DD Touch screen current monitor Defined by AI[2:0] Defi ...
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... Product data TSPX VBIAS TSMY TSMX TSPY TO ADC Table 9). Rev. 02 — 21 June 2002 UCB1400 Audio codec with touch screen controller and power management monitor VBIAS TSPX TSPY TO ADC 1 k SN00248 © Koninklijke Philips Electronics N.V. 2002. All rights reserved ...
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... int int R X2 TSPX TSMY t TSPY R Y2 Rev. 02 — 21 June 2002 UCB1400 Audio codec with touch screen controller and power management monitor VBIAS TSPX TSPY TSMX TO ADC 1 k SN00249 SCHMITT TRIGGER TSPX TSPY TSMX SCHMITT TRIGGER SN00250 © Koninklijke Philips Electronics N.V. 2002. All rights reserved. ...
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... For X and Y position measurements, (PXP, PXG, PYP, PYG) can be swapped with (MXP, MXG, MYP, MYG) to get readings reversed in direction. [2] For pressure measurements, (PXP, PXG, PYP, PYG) can be swapped with (MXP, MXG, MYP, MYG) to get the same readings with current flowing in the opposite direction. 9397 750 09611 Product data Audio codec with touch screen controller MXP MXG PYP PYG 0 1 ...
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... Feature/Control Status Register 2 (0x6C) is set to ‘1’, additional filtering is applied to the ADC data, making it more immune to high frequency fluctuations in a noisy environment. 9397 750 09611 Product data Audio codec with touch screen controller INTERNAL REFERENCE 10-BIT ADC TRACK AND HOLD AE Rev. 02 — 21 June 2002 ...
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... The internal reference voltage is connected to the VREFBYP pin, where an external capacitor can be connected to filter this reference voltage, if the VREFB bit (register 0x66) is set to ‘1’. 9397 750 09611 Product data Audio codec with touch screen controller and power management monitor AD[n] ADC INPUT ...
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... Controller does not have to continuously read the Power-down Control/Status register to detect any unexpected Codec PR status change. 9397 750 09611 Product data Audio codec with touch screen controller and power management monitor Rev. 02 — 21 June 2002 UCB1400 © Koninklijke Philips Electronics N.V. 2002. All rights reserved. ...
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Table 10: Register definitions Shaded registers are read-only. Reg Name D15 D14 D13 (HEX) 00 Reset Master Volume MM X ML5 04-0C Reserved MIC ...
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Table 10: Register definitions …continued Shaded registers are read-only. Reg Name D15 D14 D13 (HEX) 60 Negative INT OVLN CLPN TMXN TPXN ADCN X enable 62 INT clear/status OVLS CLPS TMXS 64 ...
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... Master Volume register (index 0x02) Table 13: Register address: 0x02; default: 8000 Bit Symbol Bit Symbol Table 14: Bit D15 D14 D13 - 9397 750 09611 Product data Audio codec with touch screen controller Reset register D15 D14 D13 D12 ID7 X ID5 ...
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... D15 - 12.4 Record Select register (index 0x1A) Table 17: Register address: 0x1A; default: 0000 Bit Symbol Bit Symbol Table 18: Bit D15 - D11 D10 - 9397 750 09611 Product data Audio codec with touch screen controller MIC Volume register D15 D14 D13 D12 20dB X X ...
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... Bit D15 - The LPBK bit enables loopback of the ADC output to the DAC input without involving the AC-link, allowing for full system performance measurements. 9397 750 09611 Product data Audio codec with touch screen controller Record Gain register D15 D14 D13 D12 RM X ...
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... UCB1400 control and status registers are in a fully operational state. The AC ’97 Controller must further probe this Power-down Control/Status register to determine exactly which subsections, if any, are ready. 9397 750 09611 Product data Audio codec with touch screen controller Power-down Control/Status register D15 D14 D13 ...
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... Extended Audio Status and Control register (index 0x2A) Table 27: Register address: 0x2A; default: 0000 Bit Symbol Bit Symbol Table 28: Bit D15 - D1 D0 9397 750 09611 Product data Audio codec with touch screen controller Extended Audio ID register D15 D14 D13 D12 ID1 ID0 ...
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... In non-VRA mode (VRA = 0 in register 0x2A), the only supported sample rate is 48 kHz. Table 31: Sample rate (MHz) 8000 11025 12000 16000 22050 24000 32000 44100 48000 9397 750 09611 Product data Audio codec with touch screen controller Audio DAC Sample Rate Control register D15 D14 D13 D12 DR15 DR14 DR13 DR12 DR7 ...
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... Bit D15 - D10 12.12 IO Direction register (index 0x5C) Table 34: Register address: 0x5C; default: 0000 Bit Symbol Bit Symbol Table 35: Bit D15 - D10 9397 750 09611 Product data Audio codec with touch screen controller IO Data register D15 D14 D13 D12 IO7 IO6 ...
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... Register address: 0x60; default: 0000 Bit Symbol Bit Symbol Table 39: Bit D15 D14 D13 D12 D11 D10 9397 750 09611 Product data Audio codec with touch screen controller Positive INT Enable register D15 D14 D13 D12 OVLP CLPP TMXP TPXP IOP7 IOP6 ...
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... Touch Screen Control register (index 0x64) Table 42: Register address: 0x64; default: 0000 Bit Symbol Bit Symbol Table 43: Bit D15 - D14 D13 D12 D11 9397 750 09611 Product data Audio codec with touch screen controller INT Clear/Status register D15 D14 D13 D12 OVLS CLPS TMXS TPXS IOS7 ...
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... Table 45: Bit D15 D14 - 9397 750 09611 Product data Audio codec with touch screen controller Description of Touch Screen Control register bits Symbol Type Description HYSD RW If ‘1’, hysteresis is deactivated on the Schmitt triggers. TM1 - TM0 RW Touch screen operation mode 00 = interrupt mode ...
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... Symbol Bit Symbol Table 47: Bit D15 D14 - D10 9397 750 09611 Product data Audio codec with touch screen controller Description of ADC Control register bits Symbol Type Description VREFB R/W VREF bypass. If ‘1’, the internal reference voltage is connected to VREFBYP pin. ASE RW If ‘ ...
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... Register address: 0x6A; default: 0000 Bit Symbol Bit Symbol Table 49: Bit D15 D14 - D11 D10 - 9397 750 09611 Product data Audio codec with touch screen controller Feature Control/Status Register 1 D15 D14 D13 D12 X BB3 BB2 BB1 Description of Feature Control/Status Register 1 bits Symbol ...
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... Table 50: Register address: 0x6C; default: 0000 Bit Symbol Bit Symbol Table 51: Bit D15 D14 - D13 D12 D11 - D10 9397 750 09611 Product data Audio codec with touch screen controller Feature Control/Status Register 2 D15 D14 D13 D12 SMT SUEV1 SUEV0 AVE SLP1 ...
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... Extra Interrupt register (index 0x70) Table 54: Register address: 0x70; default: 0000 Bit Symbol Bit Symbol Table 55: Bit D15 D14 D13 D12 - D0 9397 750 09611 Product data Audio codec with touch screen controller Test Control register D15 D14 D13 D12 TM6 ...
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... Vendor ID1 and ID2 registers (index 0x7C and 0x7E) Table 56: Register address: 0x7C; default: 5053 Bit Symbol Bit Symbol Table 57: Register address: 0x7E; default: 4304 Bit Symbol Bit Symbol 9397 750 09611 Product data Audio codec with touch screen controller Vendor ID1 register D15 D14 D13 D12 ...
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... Audio ADC only, Line-in selected Audio DAC and headphone driver only Touch screen bias only 10-bit ADC only Standby Rev. 02 — 21 June 2002 UCB1400 Audio codec with touch screen controller and power management monitor Min Max 0 +125 40 +85 1500 +1500 Min Typ Max 3 ...
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... (FS) digital input digital input kHz digital input digital input; A-weighted Code = 0; A-weighted kHz; L ripple ripple (p-p) Rev. 02 — 21 June 2002 UCB1400 Audio codec with touch screen controller and power management monitor Min Typ Max 200 1.0 1.0 0.1 0 1.0 25 < ...
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... Position mode selected Interrupt mode selected AD0 AD1 AD2 V = 7.5 V AD3 Non-synchronization mode ( AVE = 0) Synchronization mode; rising edge ADCSYNC to sample moment ( AVE = AVE = 0 Rev. 02 — 21 June 2002 UCB1400 Audio codec with touch screen controller and power management monitor Min Typ Max 1.89 10 2500 7 ...
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... Rising edge of RESET to Hi-Z delay off 9397 750 09611 Product data = 25 C; all voltage measured with respect to ground; unless otherwise specified. Conditions Rev. 02 — 21 June 2002 UCB1400 Audio codec with touch screen controller and power management monitor Min Typ Max 1 162 ...
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... Philips Semiconductors 17. Timing diagrams Fig 24. Cold reset timing. Fig 25. Warm reset timing. Fig 26. BIT_CLK and SYNC timing. 9397 750 09611 Product data Audio codec with touch screen controller T rst_low RESET BIT_CLK T sync_high SYNC BIT_CLK T clk_high BIT_CLK T T sync_high SYNC Rev. 02 — 21 June 2002 ...
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... Trise din SDATA_OUT Trise dout SLOT 1 SYNC BIT_CLK WRITE TO SDATA_OUT 0x26 SDATA_IN BIT_CLK not to scale. Rev. 02 — 21 June 2002 UCB1400 Audio codec with touch screen controller and power management monitor hold SN00232 Tfall clk Tfall sync Tfall din Tfall dout SN00233 ...
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... AD0 AD1 AD2 AD3 TSMY TSPX TSPY TSMX Y1 24.576 MHz C16 C17 Fig 31. Typical application circuit. 9397 750 09611 Product data Audio codec with touch screen controller RESET SDATA_OUT SDATA_IN, BIT_CLK DVdd +3 0 BIT_CLK DVDD1 10 9 SYNC DVDD2 8 25 ...
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... Philips Semiconductors TOUCH SCREEN (RESISTIVE) ADCSYNC 24.576 MHz GENERAL PURPOSE I/O PARTS Fig 32. Application block diagram. 9397 750 09611 Product data Audio codec with touch screen controller POWER SUPPLY MAIN BACKUP BATTERY (LITHIUM) THERMISTOR SPARE TOUCH MUX I/F VOLTAGE 10-BIT ADC ...
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... 0.18 7.1 7.1 9.15 9.15 1.0 0.5 0.12 6.9 6.9 8.85 8.85 REFERENCES JEDEC EIAJ MS-026 Rev. 02 — 21 June 2002 UCB1400 Audio codec with touch screen controller and power management monitor detail X (1) ( 0.75 0.95 0.95 7 0.2 0.12 0.1 ...
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... Product data parallel to the transport direction of the printed-circuit board; transport direction of the printed-circuit board. Rev. 02 — 21 June 2002 UCB1400 Audio codec with touch screen controller and power management monitor © Koninklijke Philips Electronics N.V. 2002. All rights reserved ...
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... Product data Suitability of surface mount IC packages for wave and reflow soldering methods [1] [4] , SO, SOJ Rev. 02 — 21 June 2002 UCB1400 Audio codec with touch screen controller and power management monitor Soldering method Wave Reflow not suitable suitable [3] not suitable ...
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... Section 15 “Dynamic characteristics” • Section 16 “AC Link characteristics” 01 20020103 - Objective data; initial version. 9397 750 09611 Product data Audio codec with touch screen controller and power management monitor modified. modified. modified. modified: added V parameter. es modified. ...
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... Rev. 02 — 21 June 2002 UCB1400 Audio codec with touch screen controller and power management monitor Fax: + 24825 © Koninklijke Philips Electronics N.V. 2002. All rights reserved ...
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... Wake-up support . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 8.7 Test modes 8.7.1 ATE in-circuit test mode . . . . . . . . . . . . . . . . . . . . . . 17 8.7.2 Vendor-specific test mode . . . . . . . . . . . . . . . . . . . . 17 8.8 General purpose IOs . . . . . . . . . . . . . . . . . . . . . . . . 18 8.9 Interrupt generation . . . . . . . . . . . . . . . . . . . . . . . . . 18 9 Audio codec . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 9.1 ADC analog front-end . . . . . . . . . . . . . . . . . . . . . . . 20 9.1.1 Line inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 9.1.2 Microphone input . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 9.1.3 Decimation filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 9.1.4 Overload detection . . . . . . . . . . . . . . . . . . . . . . . . . . 22 9.2 Interpolation fi ...