UCB1400BE128 NXP Semiconductors, UCB1400BE128 Datasheet - Page 10

UCB1400BE128

Manufacturer Part Number
UCB1400BE128
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of UCB1400BE128

Single Supply Voltage (typ)
3.3V
Single Supply Voltage (min)
3V
Single Supply Voltage (max)
3.6V
Package Type
LQFP
Lead Free Status / RoHS Status
Compliant
Philips Semiconductors
9397 750 09611
Product data
SDAT_OUT’s composite stream is MSB justified (MSB first) with all non-valid slots’ bit
positions stuffed with 0s by the AC ’97 Controller. If there are less than 20 valid bits
within an assigned and valid time slot, the AC ’97 Controller always stuffs all trailing
non-valid bit positions of the 20-bit slot with 0s.
Slot 1: Command address port:
monitor status (see
and 2) for AC ’97 functions including, but not limited to, sample rate, codec
configuration, and power management.
The control interface architecture supports up to 64 16-bit read/write registers,
addressable on even byte boundaries, and reserves support for 64 odd addresses, as
described in AC ’97 2.1 Component Specification Appendix D . Only the even
registers (00h, 02h, etc.) are currently defined, odd register (01h, 03h, etc.) accesses
are reserved.
Note that shadowing of the control register file on the AC ’97 Controller is an option
left open to the implementation of the AC ’97 Controller. UCB1400’s control register
file is readable as well as writable to provide more robust testability.
Audio output frame slot 1 communicates control register address, and write/read
command information to the UCB1400.
Command Address Port bit assignments are:
The first bit (MSB) sampled by UCB1400 indicates whether the current control
transaction is a read or a write operation. The following 7 bit positions communicate
with the targeted control register address. The trailing 12 bit positions within the slot
are reserved and must be stuffed with 0s by the AC ’97 Controller.
Fig 7. Start of an audio output frame.
Bit(19) Read/write command (1 = read, 0 = write).
Bit(18:12) Control register index (64 16-bit locations, addressed on even byte
boundaries)
Bit(11:0) Reserved (stuffed with 0s)
SDATA_OUT
BIT_CLK
SYNC
END OF PREVIOUS
Rev. 02 — 21 June 2002
Section 8.3.3 “AC-link audio input frame
AUDIO FRAME
FRAME
AC ’97 SAMPLES SYNC ASSERTION HERE
VALID
The command port is used to control features, and
AC ’97 SAMPLES FIRST SDATA_OUT BIT OF FRAME HERE
Audio codec with touch screen controller
slot(1)
and power management monitor
slot(2)
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
SN00222
(SDATA_IN)”, Slots 1
UCB1400
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