MC33911G5ACR2 Freescale, MC33911G5ACR2 Datasheet - Page 87

• Manufacturer Part Number: MC33911G5ACR2
• Manufacturer: Freescale

Specifications of MC33911G5ACR2

• Turn Off Delay Time: 10us
• Number Of Drivers: 2
• Operating Temperature (min): -40C
• Operating Temperature (max): 125C
• Operating Temperature Classification: Automotive
• Lead Free Status / RoHS Status: Compliant

Interrupt Mask Register - IMR
respective flags within the Interrupt Source Register (ISR) will
continue to work but will not generate interrupts to the MCU.
The 5.0 V Regulator over-temperature prewarning interrupt
and Under Voltage (VSUV) interrupts can not be masked and
will always cause an interrupt.
ISR.
HSM - High Side Interrupt Mask
the high side block.
LSM - Low Side Interrupt Mask
the low side block.
Table 62.
87
33911
FUNCTIONAL DEVICE OPERATIONS
LOGIC COMMANDS AND REGISTERS
ISR3 ISR2 ISR1 ISR0
0
0
0
0
0
0
0
This register allow to mask some of interrupt sources. The
Writing to the Interrupt Mask Register (IMR) will return the
This write-only bit enables/disables interrupts generated in
1 = HS Interrupts Enabled
0 = HS Interrupts Disabled
This write-only bit enables/disables interrupts generated in
1 = LS Interrupts Enabled
0 = LS Interrupts Disabled
Table 60. Interrupt Mask Register - $E
Condition
0
0
0
0
1
1
1
Reset
Reset
Value
Write
Interrupt Sources
0
0
1
1
0
0
1
HSM
C3
1
0
1
0
1
0
1
0
LSM
(Low-voltage and VDD over-temperature)
C2
1
POR
Voltage Monitor Interrupt
LINM
C1
1
none maskable
no interrupt
VMM
-
-
-
C0
1
Interrupt Source
LINM - LIN Interrupts Mask
the LIN block.
VMM - Voltage Monitor Interrupt Mask
the Voltage Monitor block. The only maskable interrupt in the
Voltage Monitor Block is the V
Interrupt Source Register - ISR
the last interrupt or wake-up respectively. A read of the
register acknowledges the interrupt and leads IRQ pin to
high, in case there are no other pending interrupts. If there
are pending interrupts, IRQ will be driven high for 10 µs and
then be driven low again.
ISRx - Interrupt Source Register
Table
interrupt sources are handled sequentially multiplex.
LIN Interrupt (RXSHORT, TXDOM, LIN OT, LIN
This write-only bit enables/disables interrupts generated in
1 = LIN Interrupts Enabled
0 = LIN Interrupts Disabled
This write-only bit enables/disables interrupts generated in
1 = Interrupts Enabled
0 = Interrupts Disabled
This register allows the MCU to determine the source of
This register is also returned when writing to the IMR.
These read-only bits indicate the interrupt source following
In case more than one interrupt is pending, than the
62. If no interrupt is pending than all bits are 0.
Table 61. Interrupt Source Register - $E/$F
HS Interrupt (Over-temperature)
LS Interrupt (Over-temperature)
Read
Lx Wake-up from Stop mode-
Voltage Monitor Interrupt
OC) or LIN Wake-up
Forced Wake-up
(High-voltage)
no interrupt
maskable
ISR3
S3
Analog Integrated Circuit Device Data
ISR2
S2
SUP
over-voltage interrupt.
Freescale Semiconductor
ISR1
S1
ISR0
S0
Priority
highest
lowest
none