LM2742MTC National Semiconductor, LM2742MTC Datasheet - Page 12

• Manufacturer Part Number: LM2742MTC
• Manufacturer: National Semiconductor

Specifications of LM2742MTC

• Lead Free Status / RoHS Status: Not Compliant

www.national.com
individual caps. Each capacitor has a maximum ESR of
18mΩ at 100 kHz. Power loss in each device is then 0.05W,
and total loss is 0.1W. Other possibilities for input and output
capacitors include MLCC, tantalum, OSCON, SP, and
POSCAPS.
Input Inductor
The input inductor serves two basic purposes. First, in high
power applications, the input inductor helps insulate the input
power supply from switching noise. This is especially impor-
tant if other switching converters draw current from the same
supply. Noise at high frequency, such as that developed by
the LM2742 at 1MHz operation, could pass through the input
stage of a slower converter, contaminating and possibly in-
terfering with its operation.
An input inductor also helps shield the LM2742 from high fre-
quency noise generated by other switching converters. The
second purpose of the input inductor is to limit the input cur-
rent slew rate. During a change from no-load to full-load, the
input inductor sees the highest voltage change across it,
equal to the full load current times the input capacitor ESR.
This value divided by the maximum allowable input current
slew rate gives the minimum input inductance:
In the case of a desktop computer system, the input current
slew rate is the system power supply or "silver box" output
current slew rate, which is typically about 0.1A/µs. Total input
capacitor ESR is 9mΩ, hence ΔV is 10*0.009 = 90 mV, and
the minimum inductance required is 0.9µH. The input inductor
should be rated to handle the DC input current, which is ap-
proximated by:
In this case I
TDK SLF12575T-1R2N8R2, a 1.2µH device that can handle
8.2Arms, and has a DCR of 7mΩ.
Output Inductor
The output inductor forms the first half of the power stage in
a Buck converter. It is responsible for smoothing the square
wave created by the switching action and for controlling the
output current ripple. (ΔI
lecting between tradeoffs in output ripple, efficiency, and
response time. The smaller the output inductor, the more
quickly the converter can respond to transients in the load
current. If the inductor value is increased, the ripple through
the output capacitor is reduced and thus the output ripple is
reduced. As shown in the efficiency calculations, a smaller
inductor requires a higher switching frequency to maintain the
same level of output current ripple. An increase in frequency
can mean increasing loss in the FETs due to the charging and
discharging of the gates. Generally the switching frequency
is chosen so that conduction loss outweighs switching loss.
The equation for output inductor selection is:
IN-DC
is about 2.8A. One possible choice is the
o
) The inductance is chosen by se-
12
A good range for ΔI
past, 30% was considered a maximum value for output cur-
rents higher than about 2Amps, but as output capacitor tech-
nology improves the ripple current can be allowed to increase.
Plugging in the values for output current ripple, input voltage,
output voltage, switching frequency, and assuming a 40%
peak-to-peak output current ripple yields an inductance of
1.5µH. The output inductor must be rated to handle the peak
current (also equal to the peak switch current), which is (Io +
0.5*ΔI
D05022-152HC is 1.5µH, is rated to 15Arms, and has a DCR
of 4mΩ.
Output Capacitor
The output capacitor forms the second half of the power stage
of a Buck switching converter. It is used to control the output
voltage ripple (ΔV
transients.
In this example the output current is 10A and the expected
type of capacitor is an aluminum electrolytic, as with the input
capacitors. (Other possibilities include ceramic, tantalum, and
solid electrolyte capacitors, however the ceramic type often
do not have the large capacitance needed to supply current
for load transients, and tantalums tend to be more expensive
than aluminum electrolytic.) Aluminum capacitors tend to
have very high capacitance and fairly low ESR, meaning that
the ESR zero, which affects system stability, will be much
lower than the switching frequency. The large capacitance
means that at switching frequency, the ESR is dominant,
hence the type and number of output capacitors is selected
on the basis of ESR. One simple formula to find the maximum
ESR based on the desired output voltage ripple, ΔV
designed output current ripple, ΔI
In this example, in order to maintain a 2% peak-to-peak output
voltage ripple and a 40% peak-to-peak inductor current ripple,
the required maximum ESR is 6mΩ. Three Sanyo
10MV5600AX capacitors in parallel will give an equivalent
ESR of 6mΩ. The total bulk capacitance of 16.8mF is enough
to supply even severe load transients. Using the same ca-
pacitors for both input and output also keeps the bill of mate-
rials simple.
Mosfets
MOSFETS are a critical part of any switching controller and
have a direct impact on the system efficiency. In this case the
target efficiency is 85% and this is the variable that will de-
termine which devices are acceptable. Loss from the capac-
itors, inductors, and the LM2742 itself are detailed in the
Efficiency section, and come to about 0.54W. To meet the
target efficiency, this leaves 1.45W for the FET conduction
loss, gate charging loss, and switching loss. Switching loss is
particularly difficult to estimate because it depends on many
factors. When the load current is more than about 1 or 2 amps,
conduction losses outweigh the switching and gate charging
losses. This allows FET selection based on the R
FET. Adding the FET switching and gate-charging losses to
the equation leaves 1.2W for conduction losses. The equation
for conduction loss is:
The factor k is a constant which is added to account for the
increasing R
Si4442DY has a typical R
o
P
). This is 12A for a 10A design. The Coilcraft
Cnd
= D(I
DSON
2
o
o
of a FET due to heating. Here, k = 1.3. The
) and to supply load current during fast load
o
* R
is 25 to 50% of the output current. In the
DSON
DSON
*k) + (1-D)(I
of 4.1mΩ. When plugged into
o
, is:
2
o
* R
DSON
DSON
*k)
o
and the
of the